linux/arch/xtensa
Max Filippov 549409b4b5 xtensa: ISS: allow simdisk to use high memory buffers
ISS kernel by default has only low memory. But it may be configured to
support high memory and started in a simulator with more than 128M of
RAM. Simdisk driver in such configuration can get IO request with a
high memory page. There may be no TLB entry for that page, only page
table entry. However simulators don't do pagewalking, so such IO request
will fail. Touch IO buffer in the buffer read/write loop so that a TLB
entry is likely there when read or write simcall is invoked.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2016-09-20 20:43:22 -07:00
..
boot xtensa: rearrange CCOUNT calibration 2016-09-20 18:52:59 -07:00
configs xtensa: Added Cadence CSP kernel configuration for Xtensa 2016-09-09 18:39:09 -07:00
include xtensa: extract common CPU reset code into separate function 2016-09-11 23:53:22 -07:00
kernel xtensa: rearrange CCOUNT calibration 2016-09-20 18:52:59 -07:00
lib xtensa: fixes for configs without loop option 2015-11-02 18:02:47 +03:00
mm xtensa: support reserved-memory DT node 2016-07-24 06:34:00 +03:00
oprofile xtensa: move oprofile stack tracing to stacktrace.c 2015-08-17 07:32:49 +03:00
platforms xtensa: ISS: allow simdisk to use high memory buffers 2016-09-20 20:43:22 -07:00
variants xtensa: Added Cadence CSP kernel configuration for Xtensa 2016-09-09 18:39:09 -07:00
Kconfig xtensa: fix default kernel load address 2016-09-09 18:38:35 -07:00
Kconfig.debug xtensa: disable link optimization 2014-12-15 23:47:24 -08:00
Makefile xtensa: define CONFIG_CPU_{BIG,LITTLE}_ENDIAN 2016-03-11 08:53:31 +00:00