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8d3643637e
This is a maintainability cleanup; use nice names for all the FX2 commands instead of raw bytes. This way we can easily find where we issue FX commands. Signed-off-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mike Isely <isely@pobox.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
429 lines
11 KiB
C
429 lines
11 KiB
C
/*
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*
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* $Id$
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*
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* Copyright (C) 2005 Mike Isely <isely@pobox.com>
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* Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/device.h> // for linux/firmware.h
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#include <linux/firmware.h>
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#include "pvrusb2-util.h"
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#include "pvrusb2-encoder.h"
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#include "pvrusb2-hdw-internal.h"
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#include "pvrusb2-debug.h"
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#include "pvrusb2-fx2-cmd.h"
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/* Firmware mailbox flags - definitions found from ivtv */
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#define IVTV_MBOX_FIRMWARE_DONE 0x00000004
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#define IVTV_MBOX_DRIVER_DONE 0x00000002
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#define IVTV_MBOX_DRIVER_BUSY 0x00000001
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static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
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const u32 *data, unsigned int dlen)
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{
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unsigned int idx;
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int ret;
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unsigned int offs = 0;
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unsigned int chunkCnt;
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/*
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Format: First byte must be 0x01. Remaining 32 bit words are
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spread out into chunks of 7 bytes each, little-endian ordered,
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offset at zero within each 2 blank bytes following and a
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single byte that is 0x44 plus the offset of the word. Repeat
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request for additional words, with offset adjusted
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accordingly.
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*/
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while (dlen) {
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chunkCnt = 8;
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if (chunkCnt > dlen) chunkCnt = dlen;
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memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
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hdw->cmd_buffer[0] = FX2CMD_MEM_WRITE_DWORD;
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for (idx = 0; idx < chunkCnt; idx++) {
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hdw->cmd_buffer[1+(idx*7)+6] = 0x44 + idx + offs;
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PVR2_DECOMPOSE_LE(hdw->cmd_buffer, 1+(idx*7),
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data[idx]);
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}
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ret = pvr2_send_request(hdw,
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hdw->cmd_buffer,1+(chunkCnt*7),
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NULL,0);
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if (ret) return ret;
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data += chunkCnt;
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dlen -= chunkCnt;
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offs += chunkCnt;
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}
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return 0;
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}
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static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,int statusFl,
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u32 *data, unsigned int dlen)
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{
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unsigned int idx;
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int ret;
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unsigned int offs = 0;
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unsigned int chunkCnt;
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/*
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Format: First byte must be 0x02 (status check) or 0x28 (read
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back block of 32 bit words). Next 6 bytes must be zero,
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followed by a single byte of 0x44+offset for portion to be
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read. Returned data is packed set of 32 bits words that were
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read.
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*/
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while (dlen) {
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chunkCnt = 16;
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if (chunkCnt > dlen) chunkCnt = dlen;
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memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
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hdw->cmd_buffer[0] =
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(statusFl ? FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
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hdw->cmd_buffer[7] = 0x44 + offs;
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ret = pvr2_send_request(hdw,
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hdw->cmd_buffer,8,
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hdw->cmd_buffer,chunkCnt * 4);
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if (ret) return ret;
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for (idx = 0; idx < chunkCnt; idx++) {
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data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
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}
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data += chunkCnt;
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dlen -= chunkCnt;
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offs += chunkCnt;
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}
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return 0;
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}
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/* This prototype is set up to be compatible with the
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cx2341x_mbox_func prototype in cx2341x.h, which should be in
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kernels 2.6.18 or later. We do this so that we can enable
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cx2341x.ko to write to our encoder (by handing it a pointer to this
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function). For earlier kernels this doesn't really matter. */
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static int pvr2_encoder_cmd(void *ctxt,
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int cmd,
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int arg_cnt_send,
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int arg_cnt_recv,
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u32 *argp)
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{
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unsigned int poll_count;
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int ret = 0;
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unsigned int idx;
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/* These sizes look to be limited by the FX2 firmware implementation */
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u32 wrData[16];
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u32 rdData[16];
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struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;
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/*
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The encoder seems to speak entirely using blocks 32 bit words.
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In ivtv driver terms, this is a mailbox which we populate with
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data and watch what the hardware does with it. The first word
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is a set of flags used to control the transaction, the second
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word is the command to execute, the third byte is zero (ivtv
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driver suggests that this is some kind of return value), and
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the fourth byte is a specified timeout (windows driver always
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uses 0x00060000 except for one case when it is zero). All
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successive words are the argument words for the command.
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First, write out the entire set of words, with the first word
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being zero.
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Next, write out just the first word again, but set it to
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IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
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probably means "go").
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Next, read back 16 words as status. Check the first word,
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which should have IVTV_MBOX_FIRMWARE_DONE set. If however
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that bit is not set, then the command isn't done so repeat the
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read.
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Next, read back 32 words and compare with the original
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arugments. Hopefully they will match.
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Finally, write out just the first word again, but set it to
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0x0 this time (which probably means "idle").
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*/
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if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Failed to write cx23416 command"
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" - too many input arguments"
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" (was given %u limit %lu)",
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arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
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return -EINVAL;
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}
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if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Failed to write cx23416 command"
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" - too many return arguments"
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" (was given %u limit %lu)",
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arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
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return -EINVAL;
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}
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LOCK_TAKE(hdw->ctl_lock); do {
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wrData[0] = 0;
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wrData[1] = cmd;
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wrData[2] = 0;
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wrData[3] = 0x00060000;
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for (idx = 0; idx < arg_cnt_send; idx++) {
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wrData[idx+4] = argp[idx];
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}
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for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
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wrData[idx+4] = 0;
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}
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ret = pvr2_encoder_write_words(hdw,wrData,idx);
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if (ret) break;
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wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
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ret = pvr2_encoder_write_words(hdw,wrData,1);
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if (ret) break;
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poll_count = 0;
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while (1) {
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if (poll_count < 10000000) poll_count++;
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ret = pvr2_encoder_read_words(hdw,!0,rdData,1);
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if (ret) break;
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if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
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break;
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}
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if (poll_count == 100) {
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"***WARNING*** device's encoder"
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" appears to be stuck"
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" (status=0%08x)",rdData[0]);
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Encoder command: 0x%02x",cmd);
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for (idx = 4; idx < arg_cnt_send; idx++) {
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Encoder arg%d: 0x%08x",
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idx-3,wrData[idx]);
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}
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Giving up waiting."
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" It is likely that"
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" this is a bad idea...");
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ret = -EBUSY;
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break;
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}
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}
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if (ret) break;
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wrData[0] = 0x7;
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ret = pvr2_encoder_read_words(
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hdw,0,rdData, ARRAY_SIZE(rdData));
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if (ret) break;
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for (idx = 0; idx < arg_cnt_recv; idx++) {
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argp[idx] = rdData[idx+4];
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}
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wrData[0] = 0x0;
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ret = pvr2_encoder_write_words(hdw,wrData,1);
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if (ret) break;
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} while(0); LOCK_GIVE(hdw->ctl_lock);
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return ret;
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}
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static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
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int args, ...)
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{
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va_list vl;
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unsigned int idx;
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u32 data[12];
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if (args > ARRAY_SIZE(data)) {
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pvr2_trace(
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PVR2_TRACE_ERROR_LEGS,
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"Failed to write cx23416 command"
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" - too many arguments"
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" (was given %u limit %lu)",
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args, (long unsigned) ARRAY_SIZE(data));
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return -EINVAL;
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}
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va_start(vl, args);
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for (idx = 0; idx < args; idx++) {
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data[idx] = va_arg(vl, u32);
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}
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va_end(vl);
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return pvr2_encoder_cmd(hdw,cmd,args,0,data);
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}
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int pvr2_encoder_configure(struct pvr2_hdw *hdw)
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{
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int ret;
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pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
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" (cx2341x module)");
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hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
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hdw->enc_ctl_state.width = hdw->res_hor_val;
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hdw->enc_ctl_state.height = hdw->res_ver_val;
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hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur &
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(V4L2_STD_NTSC|V4L2_STD_PAL_M)) ?
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0 : 1);
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ret = 0;
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if (!ret) ret = pvr2_encoder_vcmd(
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hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
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0xf0, 0xf0);
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/* setup firmware to notify us about some events (don't know why...) */
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if (!ret) ret = pvr2_encoder_vcmd(
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hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
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0, 0, 0x10000000, 0xffffffff);
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if (!ret) ret = pvr2_encoder_vcmd(
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hdw,CX2341X_ENC_SET_VBI_LINE, 5,
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0xffffffff,0,0,0,0);
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if (ret) {
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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"Failed to configure cx23416");
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return ret;
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}
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ret = cx2341x_update(hdw,pvr2_encoder_cmd,
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(hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
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&hdw->enc_ctl_state);
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if (ret) {
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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"Error from cx2341x module code=%d",ret);
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return ret;
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}
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ret = 0;
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if (!ret) ret = pvr2_encoder_vcmd(
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hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
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if (ret) {
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pvr2_trace(PVR2_TRACE_ERROR_LEGS,
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"Failed to initialize cx23416 video input");
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return ret;
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}
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hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_CFG);
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memcpy(&hdw->enc_cur_state,&hdw->enc_ctl_state,
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sizeof(struct cx2341x_mpeg_params));
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hdw->enc_cur_valid = !0;
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return 0;
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}
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int pvr2_encoder_start(struct pvr2_hdw *hdw)
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{
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int status;
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/* unmask some interrupts */
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pvr2_write_register(hdw, 0x0048, 0xbfffffff);
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/* change some GPIO data */
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pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000481);
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pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
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pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
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hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
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switch (hdw->config) {
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case pvr2_config_vbi:
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
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0x01,0x14);
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break;
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case pvr2_config_mpeg:
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
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0,0x13);
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break;
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default: /* Unhandled cases for now */
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
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0,0x13);
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break;
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}
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if (!status) {
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hdw->subsys_enabled_mask |= (1<<PVR2_SUBSYS_B_ENC_RUN);
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}
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return status;
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}
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int pvr2_encoder_stop(struct pvr2_hdw *hdw)
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{
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int status;
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/* mask all interrupts */
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pvr2_write_register(hdw, 0x0048, 0xffffffff);
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switch (hdw->config) {
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case pvr2_config_vbi:
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
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0x01,0x01,0x14);
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break;
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case pvr2_config_mpeg:
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
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0x01,0,0x13);
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break;
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default: /* Unhandled cases for now */
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status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
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0x01,0,0x13);
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break;
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}
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/* change some GPIO data */
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/* Note: Bit d7 of dir appears to control the LED. So we shut it
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off here. */
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pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000401);
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pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
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if (!status) {
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hdw->subsys_enabled_mask &= ~(1<<PVR2_SUBSYS_B_ENC_RUN);
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}
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return status;
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}
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/*
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Stuff for Emacs to see, in order to encourage consistent editing style:
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*** Local Variables: ***
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*** mode: c ***
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*** fill-column: 70 ***
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*** tab-width: 8 ***
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*** c-basic-offset: 8 ***
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*** End: ***
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*/
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