linux/arch/sparc64/lib
David S. Miller f7fe93344f sparc64: Remove 4MB and 512K base page size options.
Adrian Bunk reported that enabling 4MB page size breaks the build.
The problem is that MAX_ORDER combined with the page shift exceeds the
SECTION_SIZE_BITS we use in asm-sparc64/sparsemem.h

There are several ways I suppose we could work around this.  For one
we could define a CONFIG_FORCE_MAX_ZONEORDER to decrease MAX_ORDER in
these higher page size cases.

But I also know that these page size cases are broken wrt. TLB miss
handling especially on pre-hypervisor systems, and there isn't an easy
way to fix that.

These options were meant to be fun experimental hacks anyways, and
only 8K and 64K make any sense to support.

So remove 512K and 4M base page size support.  Of course, we still
support these page sizes for huge pages.

Signed-off-by: David S. Miller <davem@davemloft.net>
2008-07-17 23:44:53 -07:00
..
atomic.S [SPARC64]: Implement atomic backoff. 2007-10-17 16:24:55 -07:00
bitops.S [SPARC64]: Implement atomic backoff. 2007-10-17 16:24:55 -07:00
bzero.S
checksum.S [SPARC64]: Fix missing fold at end of checksums. 2006-06-04 21:32:01 -07:00
clear_page.S
copy_in_user.S
copy_page.S sparc64: Remove 4MB and 512K base page size options. 2008-07-17 23:44:53 -07:00
csum_copy_from_user.S
csum_copy_to_user.S
csum_copy.S [SPARC64]: Fix missing fold at end of checksums. 2006-06-04 21:32:01 -07:00
GENbzero.S [SPARC64]: Fix inconsistent .section usage in lib/ 2008-01-31 19:32:44 -08:00
GENcopy_from_user.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENcopy_to_user.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENmemcpy.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENpage.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENpatch.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
iomap.c iomap: fix 64 bits resources on 32 bits 2008-04-29 08:06:02 -07:00
ipcsum.S
Makefile [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
mcount.S sparc64: add ftrace support. 2008-05-23 22:36:13 +02:00
memcmp.S sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
memmove.S
memscan.S sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
NG2copy_from_user.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NG2copy_to_user.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NG2memcpy.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NG2page.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NG2patch.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NGbzero.S [SPARC64]: Fix inconsistent .section usage in lib/ 2008-01-31 19:32:44 -08:00
NGcopy_from_user.S [SPARC64]: Fix missing load-twin usage in Niagara-1 memcpy. 2007-10-02 01:03:09 -07:00
NGcopy_to_user.S [SPARC64]: Fix missing load-twin usage in Niagara-1 memcpy. 2007-10-02 01:03:09 -07:00
NGmemcpy.S [SPARC64]: Don't use in/local regs for ldx/stx data in N1 memcpy. 2007-10-02 16:17:17 -07:00
NGpage.S [SPARC64]: Niagara-2 optimized copies. 2007-08-16 01:47:25 -07:00
NGpatch.S
PeeCeeI.c sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
rwsem.S [SPARC/SPARC64]: Fix usage of .section .sched.text in assembler code. 2008-01-31 19:32:43 -08:00
strlen_user.S
strlen.S
strncmp.S sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
strncpy_from_user.S sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
U1copy_from_user.S
U1copy_to_user.S
U1memcpy.S
U3copy_from_user.S
U3copy_to_user.S
U3memcpy.S
U3patch.S
user_fixup.c
VISsave.S sparc64: remove CVS keywords 2008-05-20 00:33:43 -07:00
xor.S [SPARC64]: Fix register usage in xor_raid_4(). 2007-10-13 21:53:14 -07:00