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The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces, and, depending on the specific model, PCI-E interface, PCI-X interface, SATA controllers, crypto unit, SPI interface, SDIO interface, device bus, NAND controller, DMA engine and/or XOR engine. This contains the basic structure and architecture register definitions. Signed-off-by: Tzachi Perelstein <tzachi@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* arch/arm/mach-orion/common.c
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*
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* Core functions for Marvell Orion System On Chip
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*
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* Maintainer: Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/page.h>
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#include <asm/mach/map.h>
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#include <asm/arch/orion.h>
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc orion_io_desc[] __initdata = {
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{
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.virtual = ORION_REGS_BASE,
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.pfn = __phys_to_pfn(ORION_REGS_BASE),
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.length = ORION_REGS_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCIE_IO_BASE,
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.pfn = __phys_to_pfn(ORION_PCIE_IO_BASE),
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.length = ORION_PCIE_IO_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCI_IO_BASE,
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.pfn = __phys_to_pfn(ORION_PCI_IO_BASE),
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.length = ORION_PCI_IO_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = ORION_PCIE_WA_BASE,
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.pfn = __phys_to_pfn(ORION_PCIE_WA_BASE),
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.length = ORION_PCIE_WA_SIZE,
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.type = MT_DEVICE
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},
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};
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void __init orion_map_io(void)
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{
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iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
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}
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