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b920de1b77
Add architecture support for the MN10300/AM33 CPUs produced by MEI to the kernel. This patch also adds board support for the ASB2303 with the ASB2308 daughter board, and the ASB2305. The only processor supported is the MN103E010, which is an AM33v2 core plus on-chip devices. [akpm@linux-foundation.org: nuke cvs control strings] Signed-off-by: Masakazu Urade <urade.masakazu@jp.panasonic.com> Signed-off-by: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/* MN10300 ISA DMA handlers and definitions
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*
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* Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_DMA_H
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#define _ASM_DMA_H
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#include <asm/system.h>
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#include <linux/spinlock.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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#undef MAX_DMA_CHANNELS /* switch off linux/kernel/dma.c */
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#define MAX_DMA_ADDRESS 0xbfffffff
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extern spinlock_t dma_spin_lock;
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static inline unsigned long claim_dma_lock(void)
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{
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unsigned long flags;
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spin_lock_irqsave(&dma_spin_lock, flags);
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return flags;
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}
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static inline void release_dma_lock(unsigned long flags)
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{
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spin_unlock_irqrestore(&dma_spin_lock, flags);
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}
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/* enable/disable a specific DMA channel */
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static inline void enable_dma(unsigned int dmanr)
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{
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}
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static inline void disable_dma(unsigned int dmanr)
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{
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}
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/* Clear the 'DMA Pointer Flip Flop'.
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* Write 0 for LSB/MSB, 1 for MSB/LSB access.
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* Use this once to initialize the FF to a known state.
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* After that, keep track of it. :-)
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* --- In order to do that, the DMA routines below should ---
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* --- only be used while holding the DMA lock ! ---
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*/
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static inline void clear_dma_ff(unsigned int dmanr)
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{
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}
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/* set mode (above) for a specific DMA channel */
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static inline void set_dma_mode(unsigned int dmanr, char mode)
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{
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}
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/* Set only the page register bits of the transfer address.
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* This is used for successive transfers when we know the contents of
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* the lower 16 bits of the DMA current address register, but a 64k boundary
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* may have been crossed.
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*/
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static inline void set_dma_page(unsigned int dmanr, char pagenr)
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{
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}
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/* Set transfer address & page bits for specific DMA channel.
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* Assumes dma flipflop is clear.
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*/
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static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
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{
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}
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/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
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* a specific DMA channel.
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* You must ensure the parameters are valid.
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* NOTE: from a manual: "the number of transfers is one more
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* than the initial word count"! This is taken into account.
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* Assumes dma flip-flop is clear.
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* NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
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*/
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static inline void set_dma_count(unsigned int dmanr, unsigned int count)
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{
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}
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/* Get DMA residue count. After a DMA transfer, this
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* should return zero. Reading this while a DMA transfer is
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* still in progress will return unpredictable results.
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* If called before the channel has been used, it may return 1.
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* Otherwise, it returns the number of _bytes_ left to transfer.
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*
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* Assumes DMA flip-flop is clear.
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*/
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static inline int get_dma_residue(unsigned int dmanr)
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{
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return 0;
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}
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/* These are in kernel/dma.c: */
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extern int request_dma(unsigned int dmanr, const char *device_id);
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extern void free_dma(unsigned int dmanr);
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/* From PCI */
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#ifdef CONFIG_PCI
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extern int isa_dma_bridge_buggy;
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#else
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#define isa_dma_bridge_buggy (0)
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#endif
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#endif /* _ASM_DMA_H */
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