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985d4d3f6d
Merge routines fw.c and fw.h for RTL8192DE. Signed-off-by: Chaoming_Li <chaoming_li@realsil.com.cn> Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: John W. Linville <linville@tuxdriver.com>
156 lines
5.2 KiB
C
156 lines
5.2 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2010 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#ifndef __RTL92D__FW__H__
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#define __RTL92D__FW__H__
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#define FW_8192D_START_ADDRESS 0x1000
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#define FW_8192D_PAGE_SIZE 4096
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#define FW_8192D_POLLING_TIMEOUT_COUNT 1000
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#define IS_FW_HEADER_EXIST(_pfwhdr) \
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((GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x92C0 || \
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(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFF0) == 0x88C0 || \
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(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D0 || \
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(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D1 || \
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(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D2 || \
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(GET_FIRMWARE_HDR_SIGNATURE(_pfwhdr) & 0xFFFF) == 0x92D3)
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/* Define a macro that takes an le32 word, converts it to host ordering,
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* right shifts by a specified count, creates a mask of the specified
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* bit count, and extracts that number of bits.
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*/
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#define SHIFT_AND_MASK_LE(__pdesc, __shift, __mask) \
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((le32_to_cpu(*(((__le32 *)(__pdesc)))) >> (__shift)) & \
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BIT_LEN_MASK_32(__mask))
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/* Firmware Header(8-byte alinment required) */
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/* --- LONG WORD 0 ---- */
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#define GET_FIRMWARE_HDR_SIGNATURE(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr, 0, 16)
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#define GET_FIRMWARE_HDR_CATEGORY(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr, 16, 8)
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#define GET_FIRMWARE_HDR_FUNCTION(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr, 24, 8)
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#define GET_FIRMWARE_HDR_VERSION(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 4, 0, 16)
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#define GET_FIRMWARE_HDR_SUB_VER(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 4, 16, 8)
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#define GET_FIRMWARE_HDR_RSVD1(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 4, 24, 8)
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/* --- LONG WORD 1 ---- */
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#define GET_FIRMWARE_HDR_MONTH(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 8, 0, 8)
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#define GET_FIRMWARE_HDR_DATE(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 8, 8, 8)
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#define GET_FIRMWARE_HDR_HOUR(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 8, 16, 8)
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#define GET_FIRMWARE_HDR_MINUTE(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 8, 24, 8)
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#define GET_FIRMWARE_HDR_ROMCODE_SIZE(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 12, 0, 16)
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#define GET_FIRMWARE_HDR_RSVD2(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 12, 16, 16)
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/* --- LONG WORD 2 ---- */
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#define GET_FIRMWARE_HDR_SVN_IDX(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 16, 0, 32)
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#define GET_FIRMWARE_HDR_RSVD3(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 20, 0, 32)
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/* --- LONG WORD 3 ---- */
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#define GET_FIRMWARE_HDR_RSVD4(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 24, 0, 32)
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#define GET_FIRMWARE_HDR_RSVD5(__fwhdr) \
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SHIFT_AND_MASK_LE(__fwhdr + 28, 0, 32)
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#define pagenum_128(_len) \
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(u32)(((_len) >> 7) + ((_len) & 0x7F ? 1 : 0))
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#define SET_H2CCMD_PWRMODE_PARM_MODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
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#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)
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#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE(__ph2ccmd, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 1, 0, 8, __val)
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#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
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SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 2, 0, 8, __val)
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struct rtl92d_firmware_header {
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u16 signature;
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u8 category;
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u8 function;
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u16 version;
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u8 subversion;
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u8 rsvd1;
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u8 month;
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u8 date;
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u8 hour;
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u8 minute;
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u16 ramcodeSize;
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u16 rsvd2;
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u32 svnindex;
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u32 rsvd3;
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u32 rsvd4;
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u32 rsvd5;
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};
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enum rtl8192d_h2c_cmd {
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H2C_AP_OFFLOAD = 0,
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H2C_SETPWRMODE = 1,
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H2C_JOINBSSRPT = 2,
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H2C_RSVDPAGE = 3,
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H2C_RSSI_REPORT = 5,
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H2C_RA_MASK = 6,
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H2C_MAC_MODE_SEL = 9,
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H2C_PWRM = 15,
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MAX_H2CCMD
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};
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int rtl92d_download_fw(struct ieee80211_hw *hw);
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void rtl92d_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
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u32 cmd_len, u8 *p_cmdbuffer);
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void rtl92d_firmware_selfreset(struct ieee80211_hw *hw);
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void rtl92d_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
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void rtl92d_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished);
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void rtl92d_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus);
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#endif
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