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379e9bf52d
Add Hi6220 pinctrl configuration nodes Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
60 lines
1.6 KiB
C
60 lines
1.6 KiB
C
/*
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* This header provides constants for hisilicon pinctrl bindings.
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*
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* Copyright (c) 2015 Hisilicon Limited.
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* Copyright (c) 2015 Linaro Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_HISI_H
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#define _DT_BINDINGS_PINCTRL_HISI_H
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/* iomg bit definition */
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#define MUX_M0 0
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#define MUX_M1 1
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#define MUX_M2 2
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#define MUX_M3 3
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#define MUX_M4 4
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#define MUX_M5 5
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#define MUX_M6 6
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#define MUX_M7 7
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/* iocg bit definition */
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#define PULL_MASK (3)
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#define PULL_DIS (0)
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#define PULL_UP (1 << 0)
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#define PULL_DOWN (1 << 1)
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/* drive strength definition */
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#define DRIVE_MASK (7 << 4)
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#define DRIVE1_02MA (0 << 4)
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#define DRIVE1_04MA (1 << 4)
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#define DRIVE1_08MA (2 << 4)
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#define DRIVE1_10MA (3 << 4)
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#define DRIVE2_02MA (0 << 4)
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#define DRIVE2_04MA (1 << 4)
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#define DRIVE2_08MA (2 << 4)
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#define DRIVE2_10MA (3 << 4)
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#define DRIVE3_04MA (0 << 4)
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#define DRIVE3_08MA (1 << 4)
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#define DRIVE3_12MA (2 << 4)
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#define DRIVE3_16MA (3 << 4)
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#define DRIVE3_20MA (4 << 4)
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#define DRIVE3_24MA (5 << 4)
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#define DRIVE3_32MA (6 << 4)
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#define DRIVE3_40MA (7 << 4)
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#define DRIVE4_02MA (0 << 4)
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#define DRIVE4_04MA (2 << 4)
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#define DRIVE4_08MA (4 << 4)
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#define DRIVE4_10MA (6 << 4)
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#endif
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