mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-27 03:47:43 +00:00
e927f8d04e
These files are generated along with the HWMOD and will eventually be in the existing header files as soon as all drivers will be migrate to omap_hwmod / omap_device. The dma-44xx.h and irqs-44xx.h file should be in 'arch/arm/mach-omap2/include/mach/', but omap1 and omap2plus common devices still share these defines and hence currently placed in plat-omap/include/plat/ directory. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
148 lines
5.2 KiB
C
148 lines
5.2 KiB
C
/*
|
|
* OMAP4 SDMA channel definitions
|
|
*
|
|
* Copyright (C) 2009-2010 Texas Instruments, Inc.
|
|
* Copyright (C) 2009-2010 Nokia Corporation
|
|
*
|
|
* Santosh Shilimkar (santosh.shilimkar@ti.com)
|
|
* Benoit Cousson (b-cousson@ti.com)
|
|
* Paul Walmsley (paul@pwsan.com)
|
|
*
|
|
* This file is automatically generated from the OMAP hardware databases.
|
|
* We respectfully ask that any modifications to this file be coordinated
|
|
* with the public linux-omap@vger.kernel.org mailing list and the
|
|
* authors above to ensure that the autogeneration scripts are kept
|
|
* up-to-date with the file contents.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#ifndef __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
|
|
#define __ARCH_ARM_MACH_OMAP2_OMAP44XX_DMA_H
|
|
|
|
#define OMAP44XX_DMA_SYS_REQ0 2
|
|
#define OMAP44XX_DMA_SYS_REQ1 3
|
|
#define OMAP44XX_DMA_GPMC 4
|
|
#define OMAP44XX_DMA_DSS_DISPC_REQ 6
|
|
#define OMAP44XX_DMA_SYS_REQ2 7
|
|
#define OMAP44XX_DMA_MCASP1_AXEVT 8
|
|
#define OMAP44XX_DMA_ISS_REQ1 9
|
|
#define OMAP44XX_DMA_ISS_REQ2 10
|
|
#define OMAP44XX_DMA_MCASP1_AREVT 11
|
|
#define OMAP44XX_DMA_ISS_REQ3 12
|
|
#define OMAP44XX_DMA_ISS_REQ4 13
|
|
#define OMAP44XX_DMA_DSS_RFBI_REQ 14
|
|
#define OMAP44XX_DMA_SPI3_TX0 15
|
|
#define OMAP44XX_DMA_SPI3_RX0 16
|
|
#define OMAP44XX_DMA_MCBSP2_TX 17
|
|
#define OMAP44XX_DMA_MCBSP2_RX 18
|
|
#define OMAP44XX_DMA_MCBSP3_TX 19
|
|
#define OMAP44XX_DMA_MCBSP3_RX 20
|
|
#define OMAP44XX_DMA_C2C_SSCM_GPO0 21
|
|
#define OMAP44XX_DMA_C2C_SSCM_GPO1 22
|
|
#define OMAP44XX_DMA_SPI3_TX1 23
|
|
#define OMAP44XX_DMA_SPI3_RX1 24
|
|
#define OMAP44XX_DMA_I2C3_TX 25
|
|
#define OMAP44XX_DMA_I2C3_RX 26
|
|
#define OMAP44XX_DMA_I2C1_TX 27
|
|
#define OMAP44XX_DMA_I2C1_RX 28
|
|
#define OMAP44XX_DMA_I2C2_TX 29
|
|
#define OMAP44XX_DMA_I2C2_RX 30
|
|
#define OMAP44XX_DMA_MCBSP4_TX 31
|
|
#define OMAP44XX_DMA_MCBSP4_RX 32
|
|
#define OMAP44XX_DMA_MCBSP1_TX 33
|
|
#define OMAP44XX_DMA_MCBSP1_RX 34
|
|
#define OMAP44XX_DMA_SPI1_TX0 35
|
|
#define OMAP44XX_DMA_SPI1_RX0 36
|
|
#define OMAP44XX_DMA_SPI1_TX1 37
|
|
#define OMAP44XX_DMA_SPI1_RX1 38
|
|
#define OMAP44XX_DMA_SPI1_TX2 39
|
|
#define OMAP44XX_DMA_SPI1_RX2 40
|
|
#define OMAP44XX_DMA_SPI1_TX3 41
|
|
#define OMAP44XX_DMA_SPI1_RX3 42
|
|
#define OMAP44XX_DMA_SPI2_TX0 43
|
|
#define OMAP44XX_DMA_SPI2_RX0 44
|
|
#define OMAP44XX_DMA_SPI2_TX1 45
|
|
#define OMAP44XX_DMA_SPI2_RX1 46
|
|
#define OMAP44XX_DMA_MMC2_TX 47
|
|
#define OMAP44XX_DMA_MMC2_RX 48
|
|
#define OMAP44XX_DMA_UART1_TX 49
|
|
#define OMAP44XX_DMA_UART1_RX 50
|
|
#define OMAP44XX_DMA_UART2_TX 51
|
|
#define OMAP44XX_DMA_UART2_RX 52
|
|
#define OMAP44XX_DMA_UART3_TX 53
|
|
#define OMAP44XX_DMA_UART3_RX 54
|
|
#define OMAP44XX_DMA_UART4_TX 55
|
|
#define OMAP44XX_DMA_UART4_RX 56
|
|
#define OMAP44XX_DMA_MMC4_TX 57
|
|
#define OMAP44XX_DMA_MMC4_RX 58
|
|
#define OMAP44XX_DMA_MMC5_TX 59
|
|
#define OMAP44XX_DMA_MMC5_RX 60
|
|
#define OMAP44XX_DMA_MMC1_TX 61
|
|
#define OMAP44XX_DMA_MMC1_RX 62
|
|
#define OMAP44XX_DMA_SYS_REQ3 64
|
|
#define OMAP44XX_DMA_MCPDM_UP 65
|
|
#define OMAP44XX_DMA_MCPDM_DL 66
|
|
#define OMAP44XX_DMA_DMIC_REQ 67
|
|
#define OMAP44XX_DMA_C2C_SSCM_GPO2 68
|
|
#define OMAP44XX_DMA_C2C_SSCM_GPO3 69
|
|
#define OMAP44XX_DMA_SPI4_TX0 70
|
|
#define OMAP44XX_DMA_SPI4_RX0 71
|
|
#define OMAP44XX_DMA_DSS_DSI1_REQ0 72
|
|
#define OMAP44XX_DMA_DSS_DSI1_REQ1 73
|
|
#define OMAP44XX_DMA_DSS_DSI1_REQ2 74
|
|
#define OMAP44XX_DMA_DSS_DSI1_REQ3 75
|
|
#define OMAP44XX_DMA_DSS_HDMI_REQ 76
|
|
#define OMAP44XX_DMA_MMC3_TX 77
|
|
#define OMAP44XX_DMA_MMC3_RX 78
|
|
#define OMAP44XX_DMA_USIM_TX 79
|
|
#define OMAP44XX_DMA_USIM_RX 80
|
|
#define OMAP44XX_DMA_DSS_DSI2_REQ0 81
|
|
#define OMAP44XX_DMA_DSS_DSI2_REQ1 82
|
|
#define OMAP44XX_DMA_DSS_DSI2_REQ2 83
|
|
#define OMAP44XX_DMA_DSS_DSI2_REQ3 84
|
|
#define OMAP44XX_DMA_SLIMBUS1_TX0 85
|
|
#define OMAP44XX_DMA_SLIMBUS1_TX1 86
|
|
#define OMAP44XX_DMA_SLIMBUS1_TX2 87
|
|
#define OMAP44XX_DMA_SLIMBUS1_TX3 88
|
|
#define OMAP44XX_DMA_SLIMBUS1_RX0 89
|
|
#define OMAP44XX_DMA_SLIMBUS1_RX1 90
|
|
#define OMAP44XX_DMA_SLIMBUS1_RX2 91
|
|
#define OMAP44XX_DMA_SLIMBUS1_RX3 92
|
|
#define OMAP44XX_DMA_SLIMBUS2_TX0 93
|
|
#define OMAP44XX_DMA_SLIMBUS2_TX1 94
|
|
#define OMAP44XX_DMA_SLIMBUS2_TX2 95
|
|
#define OMAP44XX_DMA_SLIMBUS2_TX3 96
|
|
#define OMAP44XX_DMA_SLIMBUS2_RX0 97
|
|
#define OMAP44XX_DMA_SLIMBUS2_RX1 98
|
|
#define OMAP44XX_DMA_SLIMBUS2_RX2 99
|
|
#define OMAP44XX_DMA_SLIMBUS2_RX3 100
|
|
#define OMAP44XX_DMA_ABE_REQ_0 101
|
|
#define OMAP44XX_DMA_ABE_REQ_1 102
|
|
#define OMAP44XX_DMA_ABE_REQ_2 103
|
|
#define OMAP44XX_DMA_ABE_REQ_3 104
|
|
#define OMAP44XX_DMA_ABE_REQ_4 105
|
|
#define OMAP44XX_DMA_ABE_REQ_5 106
|
|
#define OMAP44XX_DMA_ABE_REQ_6 107
|
|
#define OMAP44XX_DMA_ABE_REQ_7 108
|
|
#define OMAP44XX_DMA_AES1_P_CTX_IN_REQ 109
|
|
#define OMAP44XX_DMA_AES1_P_DATA_IN_REQ 110
|
|
#define OMAP44XX_DMA_AES1_P_DATA_OUT_REQ 111
|
|
#define OMAP44XX_DMA_AES2_P_CTX_IN_REQ 112
|
|
#define OMAP44XX_DMA_AES2_P_DATA_IN_REQ 113
|
|
#define OMAP44XX_DMA_AES2_P_DATA_OUT_REQ 114
|
|
#define OMAP44XX_DMA_DES_P_CTX_IN_REQ 115
|
|
#define OMAP44XX_DMA_DES_P_DATA_IN_REQ 116
|
|
#define OMAP44XX_DMA_DES_P_DATA_OUT_REQ 117
|
|
#define OMAP44XX_DMA_SHA2_CTXIN_P 118
|
|
#define OMAP44XX_DMA_SHA2_DIN_P 119
|
|
#define OMAP44XX_DMA_SHA2_CTXOUT_P 120
|
|
#define OMAP44XX_DMA_AES1_P_CONTEXT_OUT_REQ 121
|
|
#define OMAP44XX_DMA_AES2_P_CONTEXT_OUT_REQ 122
|
|
#define OMAP44XX_DMA_I2C4_TX 124
|
|
#define OMAP44XX_DMA_I2C4_RX 125
|
|
|
|
#endif
|