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63243a4da7
This patch affects the clocks that use fractional ndivider in their
PLL output frequency calculation. Instead of 2^20 divide factor, the
clock's ndiv integer shift was used. Fixed the bug by replacing ndiv
integer shift with 2^20 factor.
Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Fixes:
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.. | ||
clk-bcm281xx.c | ||
clk-bcm2835.c | ||
clk-bcm21664.c | ||
clk-cygnus.c | ||
clk-iproc-armpll.c | ||
clk-iproc-asiu.c | ||
clk-iproc-pll.c | ||
clk-iproc.h | ||
clk-kona-setup.c | ||
clk-kona.c | ||
clk-kona.h | ||
Kconfig | ||
Makefile |