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3ce0e65eb6
The mv88e6390 has a number flow control registers accessed via the Flow Control register. Use these to set the pause control. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
72 lines
3.1 KiB
C
72 lines
3.1 KiB
C
/*
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* Marvell 88E6xxx Switch Port Registers support
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*
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* Copyright (c) 2008 Marvell Semiconductor
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*
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* Copyright (c) 2016 Vivien Didelot <vivien.didelot@savoirfairelinux.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef _MV88E6XXX_PORT_H
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#define _MV88E6XXX_PORT_H
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#include "mv88e6xxx.h"
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int mv88e6xxx_port_read(struct mv88e6xxx_chip *chip, int port, int reg,
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u16 *val);
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int mv88e6xxx_port_write(struct mv88e6xxx_chip *chip, int port, int reg,
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u16 val);
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int mv88e6352_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
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phy_interface_t mode);
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int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
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phy_interface_t mode);
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int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link);
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int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup);
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int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
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int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
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int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
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int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
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int mv88e6390x_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
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int mv88e6xxx_port_set_state(struct mv88e6xxx_chip *chip, int port, u8 state);
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int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map);
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int mv88e6xxx_port_get_fid(struct mv88e6xxx_chip *chip, int port, u16 *fid);
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int mv88e6xxx_port_set_fid(struct mv88e6xxx_chip *chip, int port, u16 fid);
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int mv88e6xxx_port_get_pvid(struct mv88e6xxx_chip *chip, int port, u16 *pvid);
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int mv88e6xxx_port_set_pvid(struct mv88e6xxx_chip *chip, int port, u16 pvid);
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int mv88e6xxx_port_set_8021q_mode(struct mv88e6xxx_chip *chip, int port,
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u16 mode);
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int mv88e6095_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_port_tag_remap(struct mv88e6xxx_chip *chip, int port);
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int mv88e6xxx_port_set_egress_mode(struct mv88e6xxx_chip *chip, int port,
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u16 mode);
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int mv88e6085_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_frame_mode mode);
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int mv88e6351_port_set_frame_mode(struct mv88e6xxx_chip *chip, int port,
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enum mv88e6xxx_frame_mode mode);
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int mv88e6085_port_set_egress_unknowns(struct mv88e6xxx_chip *chip, int port,
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bool on);
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int mv88e6351_port_set_egress_unknowns(struct mv88e6xxx_chip *chip, int port,
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bool on);
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int mv88e6351_port_set_ether_type(struct mv88e6xxx_chip *chip, int port,
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u16 etype);
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int mv88e6165_port_jumbo_config(struct mv88e6xxx_chip *chip, int port);
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int mv88e6095_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
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int mv88e6097_port_egress_rate_limiting(struct mv88e6xxx_chip *chip, int port);
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int mv88e6097_port_pause_config(struct mv88e6xxx_chip *chip, int port);
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int mv88e6390_port_pause_config(struct mv88e6xxx_chip *chip, int port);
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#endif /* _MV88E6XXX_PORT_H */
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