Tushar Behera 0e56523fd7 clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clock ... 'mout_mpll' is added the list of parent clocks for 'mout_cpu'. 'mout_mpll' is an alias to the clock 'sclk_mpll'. Hence 'sclk_mpll' should be added to the list of parent clocks. This results in an error when cpufreq driver for EXYNOS5250 tries to set 'mout_mpll' as a parent for 'mout_cpu'. clk_set_parent: clk sclk_mpll can not be parent of clk mout_cpu Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>		2013-05-29 15:39:28 -07:00
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clk-exynos4.c	clk: exynos: prepare for multiplatform	2013-04-19 23:00:38 +02:00
clk-exynos5250.c	clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clock	2013-05-29 15:39:28 -07:00
clk-exynos5440.c	clk: exynos: prepare for multiplatform	2013-04-19 23:00:38 +02:00
clk-pll.c	clk: samsung: Remove unimplemented ops for pll	2013-04-04 15:51:09 +09:00
clk-pll.h
clk.c	clk: samsung: Fix compilation error	2013-04-08 23:43:12 +09:00
clk.h	clk: exynos: prepare for multiplatform	2013-04-19 23:00:38 +02:00
Makefile	clk: exynos5440: register clocks using common clock framework	2013-03-25 18:17:05 +09:00