mirror of
https://github.com/FEX-Emu/linux.git
synced 2024-12-18 06:50:08 +00:00
6795c985a6
This patch adds serveral new ioctls and a new query to get_param query to support PCI MGA cards. Two ioctls were added to implement interrupt based waiting. With this change, the client-side driver no longer needs to map the primary DMA region or the MMIO region. Previously, end-of-frame waiting was done by busy waiting in the client-side driver until one of the MMIO registers (the current DMA pointer) matched a pointer to the end of primary DMA space. By using interrupts, the busy waiting and the extra mappings are removed. A third ioctl was added to bootstrap DMA. This ioctl, which is used by the X-server, moves a *LOT* of code from the X-server into the kernel. This allows the kernel to do whatever needs to be done to setup DMA buffers. The entire process and the locations of the buffers are hidden from user-mode. Additionally, a get_param query was added to differentiate between G4x0 cards and G550 cards. A gap was left in the numbering sequence so that, if needed, G450 cards could be distinguished from G400 cards. According to Ville Syrjälä, the G4x0 cards and the G550 cards handle anisotropic filtering differently. This seems the most compatible way to let the client-side driver know which card it's own. Doing this very small change now eliminates the need to bump the DRM minor version twice. http://marc.theaimsgroup.com/?l=dri-devel&m=106625815319773&w=2 (airlied - this may not work at this point, I think the follow on buffer cleanup patches will be needed) From: Ian Romanick <idr@us.ibm.com> Signed-off-by: Dave Airlie <airlied@linux.ie> |
||
|---|---|---|
| .. | ||
| ati_pcigart.c | ||
| drm_agpsupport.c | ||
| drm_auth.c | ||
| drm_bufs.c | ||
| drm_context.c | ||
| drm_core.h | ||
| drm_dma.c | ||
| drm_drawable.c | ||
| drm_drv.c | ||
| drm_fops.c | ||
| drm_init.c | ||
| drm_ioc32.c | ||
| drm_ioctl.c | ||
| drm_irq.c | ||
| drm_lock.c | ||
| drm_memory_debug.h | ||
| drm_memory.c | ||
| drm_memory.h | ||
| drm_os_linux.h | ||
| drm_pci.c | ||
| drm_pciids.h | ||
| drm_proc.c | ||
| drm_sarea.h | ||
| drm_scatter.c | ||
| drm_stub.c | ||
| drm_sysfs.c | ||
| drm_vm.c | ||
| drm.h | ||
| drmP.h | ||
| ffb_context.c | ||
| ffb_drv.c | ||
| ffb_drv.h | ||
| gamma_context.h | ||
| gamma_dma.c | ||
| gamma_drm.h | ||
| gamma_drv.c | ||
| gamma_drv.h | ||
| gamma_lists.h | ||
| gamma_lock.h | ||
| gamma_old_dma.h | ||
| i810_dma.c | ||
| i810_drm.h | ||
| i810_drv.c | ||
| i810_drv.h | ||
| i830_dma.c | ||
| i830_drm.h | ||
| i830_drv.c | ||
| i830_drv.h | ||
| i830_irq.c | ||
| i915_dma.c | ||
| i915_drm.h | ||
| i915_drv.c | ||
| i915_drv.h | ||
| i915_ioc32.c | ||
| i915_irq.c | ||
| i915_mem.c | ||
| Kconfig | ||
| Makefile | ||
| mga_dma.c | ||
| mga_drm.h | ||
| mga_drv.c | ||
| mga_drv.h | ||
| mga_ioc32.c | ||
| mga_irq.c | ||
| mga_state.c | ||
| mga_ucode.h | ||
| mga_warp.c | ||
| r128_cce.c | ||
| r128_drm.h | ||
| r128_drv.c | ||
| r128_drv.h | ||
| r128_ioc32.c | ||
| r128_irq.c | ||
| r128_state.c | ||
| radeon_cp.c | ||
| radeon_drm.h | ||
| radeon_drv.c | ||
| radeon_drv.h | ||
| radeon_ioc32.c | ||
| radeon_irq.c | ||
| radeon_mem.c | ||
| radeon_state.c | ||
| README.drm | ||
| sis_drm.h | ||
| sis_drv.c | ||
| sis_drv.h | ||
| sis_ds.c | ||
| sis_ds.h | ||
| sis_mm.c | ||
| tdfx_drv.c | ||
| tdfx_drv.h | ||
| via_3d_reg.h | ||
| via_dma.c | ||
| via_drm.h | ||
| via_drv.c | ||
| via_drv.h | ||
| via_ds.c | ||
| via_ds.h | ||
| via_irq.c | ||
| via_map.c | ||
| via_mm.c | ||
| via_mm.h | ||
| via_verifier.c | ||
| via_verifier.h | ||
| via_video.c | ||
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************
The Direct Rendering Manager (drm) is a device-independent kernel-level
device driver that provides support for the XFree86 Direct Rendering
Infrastructure (DRI).
The DRM supports the Direct Rendering Infrastructure (DRI) in four major
ways:
1. The DRM provides synchronized access to the graphics hardware via
the use of an optimized two-tiered lock.
2. The DRM enforces the DRI security policy for access to the graphics
hardware by only allowing authenticated X11 clients access to
restricted regions of memory.
3. The DRM provides a generic DMA engine, complete with multiple
queues and the ability to detect the need for an OpenGL context
switch.
4. The DRM is extensible via the use of small device-specific modules
that rely extensively on the API exported by the DRM module.
Documentation on the DRI is available from:
http://precisioninsight.com/piinsights.html
For specific information about kernel-level support, see:
The Direct Rendering Manager, Kernel Support for the Direct Rendering
Infrastructure
http://precisioninsight.com/dr/drm.html
Hardware Locking for the Direct Rendering Infrastructure
http://precisioninsight.com/dr/locking.html
A Security Analysis of the Direct Rendering Infrastructure
http://precisioninsight.com/dr/security.html
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.sourceforge.net/ *
************************************************************