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67bf04a5c2
Fix several bugs related to prefetch, ordering & speculation: - GRU cch_allocate() instruction causes cacheable memory to be created. Add a barriers to prevent speculation from prefetching data before it exists. - Add memory barriers before cache-flush instructions to ensure that previously stored data is included in the line flushed to memory. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
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c2port | ||
cb710 | ||
eeprom | ||
hdpuftrs | ||
ibmasm | ||
iwmc3200top | ||
sgi-gru | ||
sgi-xp | ||
ad525x_dpot.c | ||
atmel_pwm.c | ||
atmel_tclib.c | ||
atmel-ssc.c | ||
cs5535-mfgpt.c | ||
ds1682.c | ||
enclosure.c | ||
ep93xx_pwm.c | ||
hpilo.c | ||
hpilo.h | ||
ics932s401.c | ||
ioc4.c | ||
isl29003.c | ||
Kconfig | ||
kgdbts.c | ||
lkdtm.c | ||
Makefile | ||
phantom.c | ||
ti_dac7512.c | ||
tifm_7xx1.c | ||
tifm_core.c |