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
Make omap3isp configuration data structures more suitable for consumption by the DT by separating the I2C bus information of all the sub-devices in a group and the ISP bus information from each other. The ISP bus information is made a pointer instead of being directly embedded in the struct. In the case of the DT only the sensor specific information on the ISP bus configuration is retained. The structs are renamed to reflect that. After this change the structs needed to describe device configuration can be allocated and accessed separately without those needed only in the case of platform data. The platform data related structs can be later removed once the support for platform data can be removed. Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Acked-by: Igor Grinberg <grinberg@compulab.co.il> (for cm-t35) Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
167 lines
4.2 KiB
C
167 lines
4.2 KiB
C
/*
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* omap3isp.h
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*
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* TI OMAP3 ISP - Platform data
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*
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* Copyright (C) 2011 Nokia Corporation
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*
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* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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* Sakari Ailus <sakari.ailus@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*/
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#ifndef __MEDIA_OMAP3ISP_H__
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#define __MEDIA_OMAP3ISP_H__
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struct i2c_board_info;
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struct isp_device;
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enum isp_interface_type {
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ISP_INTERFACE_PARALLEL,
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ISP_INTERFACE_CSI2A_PHY2,
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ISP_INTERFACE_CCP2B_PHY1,
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ISP_INTERFACE_CCP2B_PHY2,
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ISP_INTERFACE_CSI2C_PHY1,
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};
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enum {
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ISP_LANE_SHIFT_0 = 0,
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ISP_LANE_SHIFT_2 = 1,
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ISP_LANE_SHIFT_4 = 2,
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ISP_LANE_SHIFT_6 = 3,
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};
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/**
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* struct isp_parallel_cfg - Parallel interface configuration
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* @data_lane_shift: Data lane shifter
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* ISP_LANE_SHIFT_0 - CAMEXT[13:0] -> CAM[13:0]
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* ISP_LANE_SHIFT_2 - CAMEXT[13:2] -> CAM[11:0]
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* ISP_LANE_SHIFT_4 - CAMEXT[13:4] -> CAM[9:0]
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* ISP_LANE_SHIFT_6 - CAMEXT[13:6] -> CAM[7:0]
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* @clk_pol: Pixel clock polarity
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* 0 - Sample on rising edge, 1 - Sample on falling edge
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* @hs_pol: Horizontal synchronization polarity
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* 0 - Active high, 1 - Active low
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* @vs_pol: Vertical synchronization polarity
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* 0 - Active high, 1 - Active low
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* @fld_pol: Field signal polarity
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* 0 - Positive, 1 - Negative
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* @data_pol: Data polarity
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* 0 - Normal, 1 - One's complement
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*/
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struct isp_parallel_cfg {
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unsigned int data_lane_shift:2;
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unsigned int clk_pol:1;
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unsigned int hs_pol:1;
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unsigned int vs_pol:1;
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unsigned int fld_pol:1;
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unsigned int data_pol:1;
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};
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enum {
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ISP_CCP2_PHY_DATA_CLOCK = 0,
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ISP_CCP2_PHY_DATA_STROBE = 1,
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};
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enum {
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ISP_CCP2_MODE_MIPI = 0,
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ISP_CCP2_MODE_CCP2 = 1,
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};
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/**
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* struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity
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* @pos: position of the lane
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* @pol: polarity of the lane
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*/
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struct isp_csiphy_lane {
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u8 pos;
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u8 pol;
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};
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#define ISP_CSIPHY1_NUM_DATA_LANES 1
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#define ISP_CSIPHY2_NUM_DATA_LANES 2
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/**
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* struct isp_csiphy_lanes_cfg - CCP2/CSI2 lane configuration
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* @data: Configuration of one or two data lanes
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* @clk: Clock lane configuration
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*/
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struct isp_csiphy_lanes_cfg {
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struct isp_csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES];
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struct isp_csiphy_lane clk;
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};
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/**
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* struct isp_ccp2_cfg - CCP2 interface configuration
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* @strobe_clk_pol: Strobe/clock polarity
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* 0 - Non Inverted, 1 - Inverted
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* @crc: Enable the cyclic redundancy check
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* @ccp2_mode: Enable CCP2 compatibility mode
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* ISP_CCP2_MODE_MIPI - MIPI-CSI1 mode
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* ISP_CCP2_MODE_CCP2 - CCP2 mode
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* @phy_layer: Physical layer selection
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* ISP_CCP2_PHY_DATA_CLOCK - Data/clock physical layer
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* ISP_CCP2_PHY_DATA_STROBE - Data/strobe physical layer
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* @vpclk_div: Video port output clock control
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*/
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struct isp_ccp2_cfg {
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unsigned int strobe_clk_pol:1;
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unsigned int crc:1;
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unsigned int ccp2_mode:1;
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unsigned int phy_layer:1;
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unsigned int vpclk_div:2;
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struct isp_csiphy_lanes_cfg lanecfg;
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};
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/**
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* struct isp_csi2_cfg - CSI2 interface configuration
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* @crc: Enable the cyclic redundancy check
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* @vpclk_div: Video port output clock control
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*/
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struct isp_csi2_cfg {
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unsigned crc:1;
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unsigned vpclk_div:2;
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struct isp_csiphy_lanes_cfg lanecfg;
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};
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struct isp_bus_cfg {
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enum isp_interface_type interface;
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union {
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struct isp_parallel_cfg parallel;
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struct isp_ccp2_cfg ccp2;
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struct isp_csi2_cfg csi2;
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} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
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};
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struct isp_platform_subdev {
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struct i2c_board_info *board_info;
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int i2c_adapter_id;
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struct isp_bus_cfg *bus;
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};
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struct isp_platform_xclk {
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const char *dev_id;
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const char *con_id;
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};
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struct isp_platform_data {
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struct isp_platform_xclk xclks[2];
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struct isp_platform_subdev *subdevs;
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void (*set_constraints)(struct isp_device *isp, bool enable);
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};
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#endif /* __MEDIA_OMAP3ISP_H__ */
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