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691557941a
linux/arch/arm/mm
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Jon Medhurst 691557941a ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect 
On Cortex-A9 before version r1p0, the LoUIS bit field of the CLIDR
register returns zero when it should return one. This leads to cache
maintenance operations which rely on this value to not function as
intended, causing data corruption.

The workaround for this errata is to detect affected CPUs and correct
the LoUIS value read.

Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Cc: stable@vger.kernel.org
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-17 10:30:49 +01:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable 2013-03-09 15:49:32 +00:00
cache-aurora-l2.h ARM: 7547/4: cache-l2x0: add support for Aurora L2 cache ctrl 2012-11-06 19:47:35 +00:00
cache-fa.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
cache-feroceon-l2.c ARM: 7696/1: Fix kexec by setting outer_cache.inv_all for Feroceon 2013-04-17 16:53:27 +01:00
cache-l2x0.c ARM: 7682/1: cache-l2x0: fix masking of RTL revision numbering and set_debug init 2013-04-03 16:45:48 +01:00
cache-tauros2.c
cache-v4.S ARM: mm: remove broken condition check for v4 flushing 2013-03-26 09:55:34 +00:00
cache-v4wb.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
cache-v4wt.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
cache-v6.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
cache-v7.S ARM: 7752/1: errata: LoUIS bit field in CLIDR register is incorrect 2013-06-17 10:30:49 +01:00
cache-xsc3l2.c
context.c ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB operations) 2013-04-03 16:45:49 +01:00
copypage-fa.c
copypage-feroceon.c
copypage-v4mc.c
copypage-v4wb.c
copypage-v4wt.c
copypage-v6.c
copypage-xsc3.c
copypage-xscale.c
dma-mapping.c Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplug' into for-linus 2013-05-02 21:30:36 +01:00
extable.c
fault-armv.c mm: replace vma prio_tree with an interval tree 2012-10-09 16:22:39 +09:00
fault.c readahead: fault retry breaks mmap file read random detection 2012-10-09 16:22:47 +09:00
fault.h
flush.c ARM: 7693/1: mm: clean-up in order to reduce to call kmap_high_get() 2013-04-17 16:55:01 +01:00
fsr-2level.c
fsr-3level.c
highmem.c
idmap.c ARM: KVM: move to a KVM provided HYP idmap 2013-04-28 22:23:08 -07:00
init.c mm/ARM: use free_highmem_page() to free highmem pages into buddy system 2013-04-29 15:54:31 -07:00
iomap.c
ioremap.c ARM: 7646/1: mm: use static_vm for managing static mapped areas 2013-02-16 17:54:22 +00:00
Kconfig Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplug' into for-linus 2013-05-02 21:30:36 +01:00
Makefile ARM: cache: remove ARMv3 support code 2013-03-26 09:55:23 +00:00
mm.h ARM: 7645/1: ioremap: introduce an infrastructure for static mapped area 2013-02-16 17:54:22 +00:00
mmap.c Merge branch 'akpm' (Andrew's patchbomb) 2012-12-11 18:05:37 -08:00
mmu.c Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplug' into for-linus 2013-05-02 21:30:36 +01:00
nommu.c
pabort-legacy.S
pabort-v6.S
pabort-v7.S
pgd.c
proc-arm7tdmi.S
proc-arm9tdmi.S
proc-arm720.S
proc-arm740.S ARM: mm: fix numerous hideous errors in proc-arm740.S 2013-03-26 09:55:33 +00:00
proc-arm920.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
proc-arm922.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm925.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm926.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
proc-arm940.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm946.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm1020.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm1020e.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm1022.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-arm1026.S ARM: mm: implement LoUIS API for cache maintenance ops 2012-09-25 11:20:25 +01:00
proc-fa526.S
proc-feroceon.S ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon 2012-09-28 21:09:50 +01:00
proc-macros.S ARM: 7649/1: mm: mm->context.id fix for big-endian 2013-02-16 17:54:26 +00:00
proc-mohawk.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
proc-sa110.S
proc-sa1100.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
proc-syms.c ARM: modules: don't export cpu_set_pte_ext when !MMU 2013-03-26 09:55:34 +00:00
proc-v6.S Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplug' into for-linus 2013-05-02 21:30:36 +01:00
proc-v7-2level.S ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead 2013-04-03 17:39:07 +01:00
proc-v7-3level.S ARM: 7691/1: mm: kill unused TLB_CAN_READ_FROM_L1_CACHE and use ALT_SMP instead 2013-04-03 17:39:07 +01:00
proc-v7.S Merge branches 'devel-stable', 'entry', 'fixes', 'mach-types', 'misc' and 'smp-hotplug' into for-linus 2013-05-02 21:30:36 +01:00
proc-xsc3.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
proc-xscale.S ARM: Do 15e0d9e37c (ARM: pm: let platforms select cpu_suspend support) properly 2013-04-08 12:00:38 +01:00
tcm.h ARM: 7694/1: ARM, TCM: initialize TCM in paging_init(), instead of setup_arch() 2013-04-17 16:53:24 +01:00
tlb-fa.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S