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6b4b78fed4
Problem: New Dell PowerEdge servers have 2 embedded ethernet ports, which are labeled NIC1 and NIC2 on the chassis, in the BIOS setup screens, and in the printed documentation. Assuming no other add-in ethernet ports in the system, Linux 2.4 kernels name these eth0 and eth1 respectively. Many people have come to expect this naming. Linux 2.6 kernels name these eth1 and eth0 respectively (backwards from expectations). I also have reports that various Sun and HP servers have similar behavior. Root cause: Linux 2.4 kernels walk the pci_devices list, which happens to be sorted in breadth-first order (or pcbios_find_device order on i386, which most often is breadth-first also). 2.6 kernels have both the pci_devices list and the pci_bus_type.klist_devices list, the latter is what is walked at driver load time to match the pci_id tables; this klist happens to be in depth-first order. On systems where, for physical routing reasons, NIC1 appears on a lower bus number than NIC2, but NIC2's bridge is discovered first in the depth-first ordering, NIC2 will be discovered before NIC1. If the list were sorted breadth-first, NIC1 would be discovered before NIC2. A PowerEdge 1955 system has the following topology which easily exhibits the difference between depth-first and breadth-first device lists. -[0000:00]-+-00.0 Intel Corporation 5000P Chipset Memory Controller Hub +-02.0-[0000:03-08]--+-00.0-[0000:04-07]--+-00.0-[0000:05-06]----00.0-[0000:06]----00.0 Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC2, 2.4 kernel name eth1, 2.6 kernel name eth0) +-1c.0-[0000:01-02]----00.0-[0000:02]----00.0 Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC1, 2.4 kernel name eth0, 2.6 kernel name eth1) Other factors, such as device driver load order and the presence of PCI slots at various points in the bus hierarchy further complicate this problem; I'm not trying to solve those here, just restore the device order, and thus basic behavior, that 2.4 kernels had. Solution: The solution can come in multiple steps. Suggested fix #1: kernel Patch below optionally sorts the two device lists into breadth-first ordering to maintain compatibility with 2.4 kernels. It adds two new command line options: pci=bfsort pci=nobfsort to force the sort order, or not, as you wish. It also adds DMI checks for the specific Dell systems which exhibit "backwards" ordering, to make them "right". Suggested fix #2: udev rules from userland Many people also have the expectation that embedded NICs are always discovered before add-in NICs (which this patch does not try to do). Using the PCI IRQ Routing Table provided by system BIOS, it's easy to determine which PCI devices are embedded, or if add-in, which PCI slot they're in. I'm working on a tool that would allow udev to name ethernet devices in ascending embedded, slot 1 .. slot N order, subsort by PCI bus/dev/fn breadth-first. It'll be possible to use it independent of udev as well for those distributions that don't use udev in their installers. Suggested fix #3: system board routing rules One can constrain the system board layout to put NIC1 ahead of NIC2 regardless of breadth-first or depth-first discovery order. This adds a significant level of complexity to board routing, and may not be possible in all instances (witness the above systems from several major manufacturers). I don't want to encourage this particular train of thought too far, at the expense of not doing #1 or #2 above. Feedback appreciated. Patch tested on a Dell PowerEdge 1955 blade with 2.6.18. You'll also note I took some liberty and temporarily break the klist abstraction to simplify and speed up the sort algorithm. I think that's both safe and appropriate in this instance. Signed-off-by: Matt Domsch <Matt_Domsch@dell.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
350 lines
8.1 KiB
C
350 lines
8.1 KiB
C
/*
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* Low-Level PCI Support for PC
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*
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* (c) 1999--2000 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/dmi.h>
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#include <asm/acpi.h>
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#include <asm/segment.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include "pci.h"
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unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
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PCI_PROBE_MMCONF;
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int pci_bf_sort;
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int pci_routeirq;
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int pcibios_last_bus = -1;
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unsigned long pirq_table_addr;
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struct pci_bus *pci_root_bus;
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struct pci_raw_ops *raw_pci_ops;
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static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
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{
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return raw_pci_ops->read(0, bus->number, devfn, where, size, value);
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}
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static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
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{
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return raw_pci_ops->write(0, bus->number, devfn, where, size, value);
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}
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struct pci_ops pci_root_ops = {
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.read = pci_read,
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.write = pci_write,
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};
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/*
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* legacy, numa, and acpi all want to call pcibios_scan_root
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* from their initcalls. This flag prevents that.
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*/
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int pcibios_scanned;
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/*
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* This interrupt-safe spinlock protects all accesses to PCI
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* configuration space.
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*/
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DEFINE_SPINLOCK(pci_config_lock);
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/*
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* Several buggy motherboards address only 16 devices and mirror
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* them to next 16 IDs. We try to detect this `feature' on all
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* primary buses (those containing host bridges as they are
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* expected to be unique) and remove the ghost devices.
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*/
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static void __devinit pcibios_fixup_ghosts(struct pci_bus *b)
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{
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struct list_head *ln, *mn;
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struct pci_dev *d, *e;
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int mirror = PCI_DEVFN(16,0);
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int seen_host_bridge = 0;
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int i;
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DBG("PCI: Scanning for ghost devices on bus %d\n", b->number);
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list_for_each(ln, &b->devices) {
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d = pci_dev_b(ln);
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if ((d->class >> 8) == PCI_CLASS_BRIDGE_HOST)
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seen_host_bridge++;
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for (mn=ln->next; mn != &b->devices; mn=mn->next) {
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e = pci_dev_b(mn);
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if (e->devfn != d->devfn + mirror ||
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e->vendor != d->vendor ||
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e->device != d->device ||
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e->class != d->class)
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continue;
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for(i=0; i<PCI_NUM_RESOURCES; i++)
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if (e->resource[i].start != d->resource[i].start ||
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e->resource[i].end != d->resource[i].end ||
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e->resource[i].flags != d->resource[i].flags)
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continue;
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break;
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}
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if (mn == &b->devices)
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return;
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}
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if (!seen_host_bridge)
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return;
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printk(KERN_WARNING "PCI: Ignoring ghost devices on bus %02x\n", b->number);
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ln = &b->devices;
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while (ln->next != &b->devices) {
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d = pci_dev_b(ln->next);
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if (d->devfn >= mirror) {
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list_del(&d->global_list);
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list_del(&d->bus_list);
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kfree(d);
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} else
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ln = ln->next;
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}
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}
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/*
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* Called after each bus is probed, but before its children
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* are examined.
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*/
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void __devinit pcibios_fixup_bus(struct pci_bus *b)
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{
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pcibios_fixup_ghosts(b);
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pci_read_bridge_bases(b);
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}
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/*
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* Only use DMI information to set this if nothing was passed
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* on the kernel command line (which was parsed earlier).
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*/
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static int __devinit set_bf_sort(struct dmi_system_id *d)
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{
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if (pci_bf_sort == pci_bf_sort_default) {
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pci_bf_sort = pci_dmi_bf;
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printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
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}
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return 0;
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}
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/*
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* Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
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*/
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#ifdef __i386__
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static int __devinit assign_all_busses(struct dmi_system_id *d)
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{
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pci_probe |= PCI_ASSIGN_ALL_BUSSES;
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printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
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" (pci=assign-busses)\n", d->ident);
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return 0;
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}
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#endif
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static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
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#ifdef __i386__
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/*
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* Laptops which need pci=assign-busses to see Cardbus cards
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*/
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{
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.callback = assign_all_busses,
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.ident = "Samsung X20 Laptop",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
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DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
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},
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},
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#endif /* __i386__ */
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{
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.callback = set_bf_sort,
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.ident = "Dell PowerEdge 1950",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
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},
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},
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{
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.callback = set_bf_sort,
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.ident = "Dell PowerEdge 1955",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
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},
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},
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{
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.callback = set_bf_sort,
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.ident = "Dell PowerEdge 2900",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
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},
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},
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{
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.callback = set_bf_sort,
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.ident = "Dell PowerEdge 2950",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
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DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
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},
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},
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{}
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};
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struct pci_bus * __devinit pcibios_scan_root(int busnum)
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{
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struct pci_bus *bus = NULL;
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dmi_check_system(pciprobe_dmi_table);
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while ((bus = pci_find_next_bus(bus)) != NULL) {
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if (bus->number == busnum) {
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/* Already scanned */
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return bus;
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}
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}
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printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
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return pci_scan_bus_parented(NULL, busnum, &pci_root_ops, NULL);
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}
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extern u8 pci_cache_line_size;
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static int __init pcibios_init(void)
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{
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struct cpuinfo_x86 *c = &boot_cpu_data;
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if (!raw_pci_ops) {
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printk(KERN_WARNING "PCI: System does not support PCI\n");
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return 0;
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}
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/*
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* Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
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* and P4. It's also good for 386/486s (which actually have 16)
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* as quite a few PCI devices do not support smaller values.
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*/
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pci_cache_line_size = 32 >> 2;
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if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
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pci_cache_line_size = 64 >> 2; /* K7 & K8 */
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else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
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pci_cache_line_size = 128 >> 2; /* P4 */
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pcibios_resource_survey();
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if (pci_bf_sort >= pci_force_bf)
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pci_sort_breadthfirst();
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#ifdef CONFIG_PCI_BIOS
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if ((pci_probe & PCI_BIOS_SORT) && !(pci_probe & PCI_NO_SORT))
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pcibios_sort();
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#endif
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return 0;
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}
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subsys_initcall(pcibios_init);
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char * __devinit pcibios_setup(char *str)
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{
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if (!strcmp(str, "off")) {
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pci_probe = 0;
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return NULL;
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} else if (!strcmp(str, "bfsort")) {
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pci_bf_sort = pci_force_bf;
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return NULL;
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} else if (!strcmp(str, "nobfsort")) {
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pci_bf_sort = pci_force_nobf;
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return NULL;
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}
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#ifdef CONFIG_PCI_BIOS
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else if (!strcmp(str, "bios")) {
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pci_probe = PCI_PROBE_BIOS;
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return NULL;
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} else if (!strcmp(str, "nobios")) {
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pci_probe &= ~PCI_PROBE_BIOS;
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return NULL;
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} else if (!strcmp(str, "nosort")) {
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pci_probe |= PCI_NO_SORT;
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return NULL;
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} else if (!strcmp(str, "biosirq")) {
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pci_probe |= PCI_BIOS_IRQ_SCAN;
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return NULL;
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} else if (!strncmp(str, "pirqaddr=", 9)) {
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pirq_table_addr = simple_strtoul(str+9, NULL, 0);
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return NULL;
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}
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#endif
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#ifdef CONFIG_PCI_DIRECT
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else if (!strcmp(str, "conf1")) {
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pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
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return NULL;
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}
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else if (!strcmp(str, "conf2")) {
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pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
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return NULL;
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}
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#endif
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#ifdef CONFIG_PCI_MMCONFIG
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else if (!strcmp(str, "nommconf")) {
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pci_probe &= ~PCI_PROBE_MMCONF;
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return NULL;
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}
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#endif
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else if (!strcmp(str, "noacpi")) {
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acpi_noirq_set();
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return NULL;
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}
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else if (!strcmp(str, "noearly")) {
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pci_probe |= PCI_PROBE_NOEARLY;
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return NULL;
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}
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#ifndef CONFIG_X86_VISWS
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else if (!strcmp(str, "usepirqmask")) {
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pci_probe |= PCI_USE_PIRQ_MASK;
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return NULL;
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} else if (!strncmp(str, "irqmask=", 8)) {
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pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
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return NULL;
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} else if (!strncmp(str, "lastbus=", 8)) {
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pcibios_last_bus = simple_strtol(str+8, NULL, 0);
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return NULL;
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}
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#endif
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else if (!strcmp(str, "rom")) {
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pci_probe |= PCI_ASSIGN_ROMS;
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return NULL;
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} else if (!strcmp(str, "assign-busses")) {
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pci_probe |= PCI_ASSIGN_ALL_BUSSES;
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return NULL;
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} else if (!strcmp(str, "routeirq")) {
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pci_routeirq = 1;
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return NULL;
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}
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return str;
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}
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unsigned int pcibios_assign_all_busses(void)
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{
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return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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int err;
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if ((err = pcibios_enable_resources(dev, mask)) < 0)
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return err;
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return pcibios_enable_irq(dev);
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}
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void pcibios_disable_device (struct pci_dev *dev)
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{
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pcibios_disable_resources(dev);
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if (pcibios_disable_irq)
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pcibios_disable_irq(dev);
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}
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