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fd4f683d04
Remove the special handling for the Data TLB entry dirty bit in the TLB-miss handler. As the code stands, all that it does is to cause us to take a second data address exception to set the dirty bit. Instead, we can just let pte_mkdirty() set the bit. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
190 lines
4.4 KiB
ArmAsm
190 lines
4.4 KiB
ArmAsm
###############################################################################
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#
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# TLB loading functions
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#
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# Copyright (C) 2007 Matsushita Electric Industrial Co., Ltd.
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# Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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# Modified by David Howells (dhowells@redhat.com)
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public Licence
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# as published by the Free Software Foundation; either version
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# 2 of the Licence, or (at your option) any later version.
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#
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###############################################################################
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <asm/smp.h>
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#include <asm/intctl-regs.h>
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#include <asm/frame.inc>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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###############################################################################
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#
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# Instruction TLB Miss handler entry point
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#
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###############################################################################
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.type itlb_miss,@function
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ENTRY(itlb_miss)
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and ~EPSW_NMID,epsw
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#ifdef CONFIG_GDBSTUB
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movm [d2,d3,a2],(sp)
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#else
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or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
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# register bank
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nop
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nop
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nop
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#endif
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mov (IPTEU),d3
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mov (PTBR),a2
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mov d3,d2
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and 0xffc00000,d2
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lsr 20,d2
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mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
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btst _PAGE_VALID,a2
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beq itlb_miss_fault # jump if doesn't point anywhere
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and ~(PAGE_SIZE-1),a2
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mov d3,d2
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and 0x003ff000,d2
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lsr 10,d2
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add d2,a2
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mov (a2),d2 # get pte from PTD[addr 21..12]
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btst _PAGE_VALID,d2
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beq itlb_miss_fault # jump if doesn't point to a page
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# (might be a swap id)
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bset _PAGE_ACCESSED,(0,a2)
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and ~(xPTEL_UNUSED1|xPTEL_UNUSED2),d2
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itlb_miss_set:
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mov d2,(IPTEL) # change the TLB
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#ifdef CONFIG_GDBSTUB
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movm (sp),[d2,d3,a2]
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#endif
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rti
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itlb_miss_fault:
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mov _PAGE_VALID,d2 # force address error handler to be
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# invoked
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bra itlb_miss_set
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.size itlb_miss, . - itlb_miss
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###############################################################################
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#
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# Data TLB Miss handler entry point
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#
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###############################################################################
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.type dtlb_miss,@function
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ENTRY(dtlb_miss)
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and ~EPSW_NMID,epsw
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#ifdef CONFIG_GDBSTUB
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movm [d2,d3,a2],(sp)
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#else
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or EPSW_nAR,epsw # switch D0-D3 & A0-A3 to the alternate
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# register bank
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nop
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nop
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nop
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#endif
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mov (DPTEU),d3
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mov (PTBR),a2
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mov d3,d2
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and 0xffc00000,d2
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lsr 20,d2
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mov (a2,d2),a2 # PTD *ptd = PGD[addr 31..22]
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btst _PAGE_VALID,a2
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beq dtlb_miss_fault # jump if doesn't point anywhere
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and ~(PAGE_SIZE-1),a2
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mov d3,d2
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and 0x003ff000,d2
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lsr 10,d2
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add d2,a2
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mov (a2),d2 # get pte from PTD[addr 21..12]
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btst _PAGE_VALID,d2
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beq dtlb_miss_fault # jump if doesn't point to a page
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# (might be a swap id)
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bset _PAGE_ACCESSED,(0,a2)
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and ~(xPTEL_UNUSED1|xPTEL_UNUSED2),d2
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dtlb_miss_set:
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mov d2,(DPTEL) # change the TLB
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#ifdef CONFIG_GDBSTUB
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movm (sp),[d2,d3,a2]
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#endif
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rti
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dtlb_miss_fault:
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mov _PAGE_VALID,d2 # force address error handler to be
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# invoked
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bra dtlb_miss_set
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.size dtlb_miss, . - dtlb_miss
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###############################################################################
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#
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# Instruction TLB Address Error handler entry point
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#
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###############################################################################
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.type itlb_aerror,@function
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ENTRY(itlb_aerror)
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and ~EPSW_NMID,epsw
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add -4,sp
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SAVE_ALL
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add -4,sp # need to pass three params
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# calculate the fault code
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movhu (MMUFCR_IFC),d1
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or 0x00010000,d1 # it's an instruction fetch
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# determine the page address
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mov (IPTEU),a2
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mov a2,d0
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and PAGE_MASK,d0
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mov d0,(12,sp)
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clr d0
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mov d0,(IPTEL)
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and ~EPSW_NMID,epsw
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or EPSW_IE,epsw
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mov fp,d0
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call do_page_fault[],0 # do_page_fault(regs,code,addr
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jmp ret_from_exception
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.size itlb_aerror, . - itlb_aerror
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###############################################################################
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#
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# Data TLB Address Error handler entry point
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#
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###############################################################################
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.type dtlb_aerror,@function
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ENTRY(dtlb_aerror)
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and ~EPSW_NMID,epsw
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add -4,sp
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SAVE_ALL
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add -4,sp # need to pass three params
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# calculate the fault code
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movhu (MMUFCR_DFC),d1
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# determine the page address
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mov (DPTEU),a2
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mov a2,d0
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and PAGE_MASK,d0
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mov d0,(12,sp)
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clr d0
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mov d0,(DPTEL)
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and ~EPSW_NMID,epsw
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or EPSW_IE,epsw
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mov fp,d0
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call do_page_fault[],0 # do_page_fault(regs,code,addr
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jmp ret_from_exception
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.size dtlb_aerror, . - dtlb_aerror
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