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6f457e1a14
The clear-by-asce operation of the idte instruction gets an asce (address-space-control-element) as argument to specify which TLBs need to get flushed. The current code passes a plain pointer to the start of the pgd without the additional bits which would make the pointer an asce. The current machines don't mind the difference but a future model might want to use the designation type control bits in the asce as a filter for the TLBs to flush. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
#ifndef _S390_TLBFLUSH_H
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#define _S390_TLBFLUSH_H
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#include <linux/mm.h>
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#include <asm/processor.h>
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#include <asm/pgalloc.h>
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/*
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* Flush all tlb entries on the local cpu.
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*/
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static inline void __tlb_flush_local(void)
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{
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asm volatile("ptlb" : : : "memory");
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}
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/*
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* Flush all tlb entries on all cpus.
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*/
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static inline void __tlb_flush_global(void)
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{
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extern void smp_ptlb_all(void);
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register unsigned long reg2 asm("2");
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register unsigned long reg3 asm("3");
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register unsigned long reg4 asm("4");
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long dummy;
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#ifndef __s390x__
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if (!MACHINE_HAS_CSP) {
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smp_ptlb_all();
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return;
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}
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#endif /* __s390x__ */
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dummy = 0;
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reg2 = reg3 = 0;
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reg4 = ((unsigned long) &dummy) + 1;
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asm volatile(
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" csp %0,%2"
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: : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" );
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}
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/*
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* Flush all tlb entries of a page table on all cpus.
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*/
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static inline void __tlb_flush_idte(unsigned long asce)
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{
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asm volatile(
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" .insn rrf,0xb98e0000,0,%0,%1,0"
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: : "a" (2048), "a" (asce) : "cc" );
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}
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static inline void __tlb_flush_mm(struct mm_struct * mm)
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{
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cpumask_t local_cpumask;
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if (unlikely(cpus_empty(mm->cpu_vm_mask)))
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return;
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/*
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* If the machine has IDTE we prefer to do a per mm flush
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* on all cpus instead of doing a local flush if the mm
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* only ran on the local cpu.
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*/
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if (MACHINE_HAS_IDTE) {
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pgd_t *shadow = get_shadow_table(mm->pgd);
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if (shadow)
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__tlb_flush_idte((unsigned long) shadow | mm->context);
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__tlb_flush_idte((unsigned long) mm->pgd | mm->context);
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return;
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}
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preempt_disable();
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/*
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* If the process only ran on the local cpu, do a local flush.
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*/
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local_cpumask = cpumask_of_cpu(smp_processor_id());
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if (cpus_equal(mm->cpu_vm_mask, local_cpumask))
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__tlb_flush_local();
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else
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__tlb_flush_global();
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preempt_enable();
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}
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static inline void __tlb_flush_mm_cond(struct mm_struct * mm)
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{
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if (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm)
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__tlb_flush_mm(mm);
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}
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/*
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* TLB flushing:
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* flush_tlb() - flushes the current mm struct TLBs
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* flush_tlb_all() - flushes all processes TLBs
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* flush_tlb_mm(mm) - flushes the specified mm context TLB's
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* flush_tlb_page(vma, vmaddr) - flushes one page
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* flush_tlb_range(vma, start, end) - flushes a range of pages
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* flush_tlb_kernel_range(start, end) - flushes a range of kernel pages
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*/
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/*
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* flush_tlb_mm goes together with ptep_set_wrprotect for the
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* copy_page_range operation and flush_tlb_range is related to
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* ptep_get_and_clear for change_protection. ptep_set_wrprotect and
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* ptep_get_and_clear do not flush the TLBs directly if the mm has
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* only one user. At the end of the update the flush_tlb_mm and
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* flush_tlb_range functions need to do the flush.
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*/
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#define flush_tlb() do { } while (0)
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#define flush_tlb_all() do { } while (0)
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#define flush_tlb_mm(mm) __tlb_flush_mm_cond(mm)
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#define flush_tlb_page(vma, addr) do { } while (0)
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#define flush_tlb_range(vma, start, end) __tlb_flush_mm_cond(mm)
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#define flush_tlb_kernel_range(start, end) __tlb_flush_mm(&init_mm)
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#endif /* _S390_TLBFLUSH_H */
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