Magnus Damm 720be99006 sh: no high level trigger on some sh3 cpus ... The processor models sh7706, sh7707 and sh7709 don't support high level trigger sense configuration. And the intc code looks like crap these days so what's the difference. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2008-05-08 19:52:06 +09:00
..
irq	sh: no high level trigger on some sh3 cpus	2008-05-08 19:52:06 +09:00
sh2	sh: Fix up the address error exception handler for SH-2.	2008-03-13 19:43:07 +09:00
sh2a	sh: Initial support for the MX-G CPU.	2008-04-18 09:50:01 -07:00
sh3	sh: clean up sh7710 and sh7720 intc tables	2008-05-08 19:52:04 +09:00
sh4	sh: Fix up L2 cache probe.	2008-04-18 09:50:07 -07:00
sh4a	sh: Add support for SH7723 CPU subtype.	2008-04-18 09:50:07 -07:00
sh5	sh64: Setup I/D-TLB defaults in SH-5 probe path.	2008-05-08 19:51:38 +09:00
adc.c
clock.c
init.c	sh: Fix up section mismatches.	2008-03-06 12:43:38 +09:00
Makefile
ubc.S