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ad7ad57c61
Fully unify all of the DMA ops so that subordinate bus types to the DMA operation providers (such as ebus, isa, of_device) can work transparently. Basically, we just make sure that for every system device we create, the dev->archdata 'iommu' and 'stc' fields are filled in. Then we have two platform variants of the DMA ops, one for SUN4U which actually programs the real hardware, and one for SUN4V which makes hypervisor calls. This also fixes the crashes in parport_pc on sparc64, reported by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
191 lines
5.6 KiB
C
191 lines
5.6 KiB
C
/* sbus.h: Defines for the Sun SBus.
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*
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* Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net)
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*/
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#ifndef _SPARC64_SBUS_H
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#define _SPARC64_SBUS_H
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#include <linux/dma-mapping.h>
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#include <linux/ioport.h>
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#include <asm/oplib.h>
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#include <asm/prom.h>
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#include <asm/of_device.h>
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#include <asm/iommu.h>
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#include <asm/scatterlist.h>
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/* We scan which devices are on the SBus using the PROM node device
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* tree. SBus devices are described in two different ways. You can
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* either get an absolute address at which to access the device, or
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* you can get a SBus 'slot' number and an offset within that slot.
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*/
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/* The base address at which to calculate device OBIO addresses. */
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#define SUN_SBUS_BVADDR 0x00000000
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#define SBUS_OFF_MASK 0x0fffffff
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/* These routines are used to calculate device address from slot
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* numbers + offsets, and vice versa.
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*/
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static __inline__ unsigned long sbus_devaddr(int slotnum, unsigned long offset)
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{
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return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset));
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}
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static __inline__ int sbus_dev_slot(unsigned long dev_addr)
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{
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return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28);
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}
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struct sbus_bus;
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/* Linux SBUS device tables */
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struct sbus_dev {
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struct of_device ofdev;
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struct sbus_bus *bus;
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struct sbus_dev *next;
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struct sbus_dev *child;
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struct sbus_dev *parent;
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int prom_node;
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char prom_name[64];
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int slot;
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struct resource resource[PROMREG_MAX];
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struct linux_prom_registers reg_addrs[PROMREG_MAX];
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int num_registers;
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struct linux_prom_ranges device_ranges[PROMREG_MAX];
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int num_device_ranges;
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unsigned int irqs[4];
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int num_irqs;
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};
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#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev)
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/* This struct describes the SBus(s) found on this machine. */
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struct sbus_bus {
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struct of_device ofdev;
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struct sbus_dev *devices; /* Tree of SBUS devices */
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struct sbus_bus *next; /* Next SBUS in system */
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int prom_node; /* OBP node of SBUS */
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char prom_name[64]; /* Usually "sbus" or "sbi" */
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int clock_freq;
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struct linux_prom_ranges sbus_ranges[PROMREG_MAX];
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int num_sbus_ranges;
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int portid;
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};
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#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev)
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extern struct sbus_bus *sbus_root;
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/* Device probing routines could find these handy */
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#define for_each_sbus(bus) \
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for((bus) = sbus_root; (bus); (bus)=(bus)->next)
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#define for_each_sbusdev(device, bus) \
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for((device) = (bus)->devices; (device); (device)=(device)->next)
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#define for_all_sbusdev(device, bus) \
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for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \
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for ((device) = (bus)->devices; (device); (device) = (device)->next)
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/* Driver DVMA interfaces. */
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#define sbus_can_dma_64bit(sdev) (1)
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#define sbus_can_burst64(sdev) (1)
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extern void sbus_set_sbus64(struct sbus_dev *, int);
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extern void sbus_fill_device_irq(struct sbus_dev *);
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static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size,
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dma_addr_t *dma_handle)
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{
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return dma_alloc_coherent(&sdev->ofdev.dev, size,
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dma_handle, GFP_ATOMIC);
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}
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static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size,
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void *vaddr, dma_addr_t dma_handle)
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{
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return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle);
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}
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#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL
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#define SBUS_DMA_TODEVICE DMA_TO_DEVICE
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#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE
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#define SBUS_DMA_NONE DMA_NONE
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/* All the rest use streaming mode mappings. */
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static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr,
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size_t size, int direction)
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{
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return dma_map_single(&sdev->ofdev.dev, ptr, size,
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(enum dma_data_direction) direction);
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}
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static inline void sbus_unmap_single(struct sbus_dev *sdev,
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dma_addr_t dma_addr, size_t size,
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int direction)
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{
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dma_unmap_single(&sdev->ofdev.dev, dma_addr, size,
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(enum dma_data_direction) direction);
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}
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static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg,
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int nents, int direction)
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{
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return dma_map_sg(&sdev->ofdev.dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg,
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int nents, int direction)
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{
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dma_unmap_sg(&sdev->ofdev.dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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/* Finally, allow explicit synchronization of streamable mappings. */
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static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev,
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dma_addr_t dma_handle,
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size_t size, int direction)
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{
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dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size,
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(enum dma_data_direction) direction);
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}
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#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu
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static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev,
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dma_addr_t dma_handle,
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size_t size, int direction)
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{
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/* No flushing needed to sync cpu writes to the device. */
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}
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static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev,
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struct scatterlist *sg,
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int nents, int direction)
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{
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dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents,
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(enum dma_data_direction) direction);
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}
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#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu
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static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev,
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struct scatterlist *sg,
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int nents, int direction)
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{
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/* No flushing needed to sync cpu writes to the device. */
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}
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extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *);
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extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *);
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extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *);
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extern int sbus_arch_preinit(void);
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extern void sbus_arch_postinit(void);
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#endif /* !(_SPARC64_SBUS_H) */
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