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76b2ab76a4
no board configure it as 'n' and it's an issue to merge all defconfigs in one On AT91SAM926x boards both types of NAND flash can be present (8 and 16 bit data bus width). so will pass it via system_rev Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
405 lines
9.4 KiB
C
405 lines
9.4 KiB
C
/*
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* linux/arch/arm/mach-at91/board-cap9adk.c
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*
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* Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com>
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* Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com>
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* Copyright (C) 2005 SAN People
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* Copyright (C) 2007 Atmel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/ads7846.h>
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#include <linux/fb.h>
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#include <linux/mtd/physmap.h>
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#include <video/atmel_lcdc.h>
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#include <mach/hardware.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#include <mach/at91cap9_matrix.h>
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#include <mach/at91sam9_smc.h>
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#include <mach/system_rev.h>
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#include "sam9_smc.h"
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#include "generic.h"
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static void __init cap9adk_map_io(void)
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{
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/* Initialize processor: 12 MHz crystal */
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at91cap9_initialize(12000000);
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/* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */
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at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11);
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/* ... POWER LED always on */
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at91_set_gpio_output(AT91_PIN_PC29, 1);
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/* Setup the serial ports and console */
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at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */
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at91_set_serial_console(0);
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}
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static void __init cap9adk_init_irq(void)
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{
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at91cap9_init_interrupts(NULL);
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}
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/*
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* USB Host port
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*/
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static struct at91_usbh_data __initdata cap9adk_usbh_data = {
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.ports = 2,
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};
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/*
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* USB HS Device port
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*/
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static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
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.vbus_pin = AT91_PIN_PB31,
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};
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/*
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* ADS7846 Touchscreen
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*/
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#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
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static int ads7843_pendown_state(void)
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{
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return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */
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}
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static struct ads7846_platform_data ads_info = {
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.model = 7843,
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.x_min = 150,
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.x_max = 3830,
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.y_min = 190,
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.y_max = 3830,
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.vref_delay_usecs = 100,
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.x_plate_ohms = 450,
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.y_plate_ohms = 250,
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.pressure_max = 15000,
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.debounce_max = 1,
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.debounce_rep = 0,
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.debounce_tol = (~0),
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.get_pendown_state = ads7843_pendown_state,
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};
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static void __init cap9adk_add_device_ts(void)
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{
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at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */
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at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */
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}
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#else
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static void __init cap9adk_add_device_ts(void) {}
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#endif
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/*
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* SPI devices.
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*/
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static struct spi_board_info cap9adk_spi_devices[] = {
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#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
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{ /* DataFlash card */
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.modalias = "mtd_dataflash",
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.chip_select = 0,
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.max_speed_hz = 15 * 1000 * 1000,
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.bus_num = 0,
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},
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#endif
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#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
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{
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.modalias = "ads7846",
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.chip_select = 3, /* can be 2 or 3, depending on J2 jumper */
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.max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
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.bus_num = 0,
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.platform_data = &ads_info,
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.irq = AT91_PIN_PC4,
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},
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#endif
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};
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/*
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* MCI (SD/MMC)
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*/
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static struct at91_mmc_data __initdata cap9adk_mmc_data = {
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.wire4 = 1,
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// .det_pin = ... not connected
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// .wp_pin = ... not connected
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// .vcc_pin = ... not connected
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};
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/*
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* MACB Ethernet device
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*/
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static struct at91_eth_data __initdata cap9adk_macb_data = {
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.is_rmii = 1,
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};
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/*
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* NAND flash
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*/
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static struct mtd_partition __initdata cap9adk_nand_partitions[] = {
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{
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.name = "NAND partition",
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
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{
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*num_partitions = ARRAY_SIZE(cap9adk_nand_partitions);
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return cap9adk_nand_partitions;
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}
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static struct atmel_nand_data __initdata cap9adk_nand_data = {
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.ale = 21,
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.cle = 22,
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// .det_pin = ... not connected
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// .rdy_pin = ... not connected
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.enable_pin = AT91_PIN_PD15,
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.partition_info = nand_partitions,
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};
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static struct sam9_smc_config __initdata cap9adk_nand_smc_config = {
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.ncs_read_setup = 1,
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.nrd_setup = 2,
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.ncs_write_setup = 1,
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.nwe_setup = 2,
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.ncs_read_pulse = 6,
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.nrd_pulse = 4,
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.ncs_write_pulse = 6,
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.nwe_pulse = 4,
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.read_cycle = 8,
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.write_cycle = 8,
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.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
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.tdf_cycles = 1,
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};
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static void __init cap9adk_add_device_nand(void)
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{
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unsigned long csa;
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csa = at91_sys_read(AT91_MATRIX_EBICSA);
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at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
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cap9adk_nand_data.bus_width_16 = !board_have_nand_8bit();
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/* setup bus-width (8 or 16) */
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if (cap9adk_nand_data.bus_width_16)
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cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_16;
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else
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cap9adk_nand_smc_config.mode |= AT91_SMC_DBW_8;
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/* configure chip-select 3 (NAND) */
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sam9_smc_configure(3, &cap9adk_nand_smc_config);
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at91_add_device_nand(&cap9adk_nand_data);
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}
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/*
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* NOR flash
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*/
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static struct mtd_partition cap9adk_nor_partitions[] = {
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{
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.name = "NOR partition",
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.offset = 0,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data cap9adk_nor_data = {
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.width = 2,
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.parts = cap9adk_nor_partitions,
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.nr_parts = ARRAY_SIZE(cap9adk_nor_partitions),
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};
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#define NOR_BASE AT91_CHIPSELECT_0
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#define NOR_SIZE SZ_8M
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static struct resource nor_flash_resources[] = {
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{
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.start = NOR_BASE,
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.end = NOR_BASE + NOR_SIZE - 1,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device cap9adk_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &cap9adk_nor_data,
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},
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.resource = nor_flash_resources,
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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};
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static struct sam9_smc_config __initdata cap9adk_nor_smc_config = {
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.ncs_read_setup = 2,
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.nrd_setup = 4,
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.ncs_write_setup = 2,
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.nwe_setup = 4,
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.ncs_read_pulse = 10,
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.nrd_pulse = 8,
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.ncs_write_pulse = 10,
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.nwe_pulse = 8,
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.read_cycle = 16,
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.write_cycle = 16,
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.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16,
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.tdf_cycles = 1,
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};
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static __init void cap9adk_add_device_nor(void)
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{
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unsigned long csa;
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csa = at91_sys_read(AT91_MATRIX_EBICSA);
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at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V);
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/* configure chip-select 0 (NOR) */
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sam9_smc_configure(0, &cap9adk_nor_smc_config);
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platform_device_register(&cap9adk_nor_flash);
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}
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/*
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* LCD Controller
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*/
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#if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
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static struct fb_videomode at91_tft_vga_modes[] = {
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{
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.name = "TX09D50VM1CCA @ 60",
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.refresh = 60,
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.xres = 240, .yres = 320,
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.pixclock = KHZ2PICOS(4965),
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.left_margin = 1, .right_margin = 33,
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.upper_margin = 1, .lower_margin = 0,
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.hsync_len = 5, .vsync_len = 1,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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};
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static struct fb_monspecs at91fb_default_monspecs = {
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.manufacturer = "HIT",
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.monitor = "TX09D70VM1CCA",
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.modedb = at91_tft_vga_modes,
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.modedb_len = ARRAY_SIZE(at91_tft_vga_modes),
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.hfmin = 15000,
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.hfmax = 64000,
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.vfmin = 50,
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.vfmax = 150,
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};
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#define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \
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| ATMEL_LCDC_DISTYPE_TFT \
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| ATMEL_LCDC_CLKMOD_ALWAYSACTIVE)
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static void at91_lcdc_power_control(int on)
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{
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if (on)
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at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */
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else
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at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */
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}
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/* Driver datas */
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static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = {
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.default_bpp = 16,
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.default_dmacon = ATMEL_LCDC_DMAEN,
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.default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2,
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.default_monspecs = &at91fb_default_monspecs,
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.atmel_lcdfb_power_control = at91_lcdc_power_control,
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.guard_time = 1,
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};
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#else
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static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data;
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#endif
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/*
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* AC97
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*/
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static struct ac97c_platform_data cap9adk_ac97_data = {
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// .reset_pin = ... not connected
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};
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static void __init cap9adk_board_init(void)
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{
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/* Serial */
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at91_add_device_serial();
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/* USB Host */
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at91_add_device_usbh(&cap9adk_usbh_data);
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/* USB HS */
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at91_add_device_usba(&cap9adk_usba_udc_data);
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/* SPI */
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at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
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/* Touchscreen */
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cap9adk_add_device_ts();
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/* MMC */
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at91_add_device_mmc(1, &cap9adk_mmc_data);
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/* Ethernet */
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at91_add_device_eth(&cap9adk_macb_data);
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/* NAND */
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cap9adk_add_device_nand();
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/* NOR Flash */
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cap9adk_add_device_nor();
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/* I2C */
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at91_add_device_i2c(NULL, 0);
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/* LCD Controller */
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at91_add_device_lcdc(&cap9adk_lcdc_data);
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/* AC97 */
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at91_add_device_ac97(&cap9adk_ac97_data);
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}
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MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK")
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/* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */
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.boot_params = AT91_SDRAM_BASE + 0x100,
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.timer = &at91sam926x_timer,
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.map_io = cap9adk_map_io,
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.init_irq = cap9adk_init_irq,
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.init_machine = cap9adk_board_init,
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MACHINE_END
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