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1d5210008b
This patch will provide a more reliable and easy way for user-space applications to have access to AER logs rather than reading them from the message buffer. It also provides a way to notify user-space when an AER event occurs. The aer driver is updated to generate a trace event of function 'aer_event' when a PCIe error is reported over the AER interface. The trace event was added to both the interrupt based aer path and the firmware first path. Signed-off-by: Lance Ortiz <lance.ortiz@hp.com> Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Acked-by: Boris Petkov <bp@alien8.de> Signed-off-by: Tony Luck <tony.luck@intel.com>
421 lines
14 KiB
C
421 lines
14 KiB
C
/*
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* UEFI Common Platform Error Record (CPER) support
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*
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* Copyright (C) 2010, Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*
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* CPER is the format used to describe platform hardware error by
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* various APEI tables, such as ERST, BERT and HEST etc.
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*
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* For more information about CPER, please refer to Appendix N of UEFI
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* Specification version 2.3.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/cper.h>
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#include <linux/acpi.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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/*
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* CPER record ID need to be unique even after reboot, because record
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* ID is used as index for ERST storage, while CPER records from
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* multiple boot may co-exist in ERST.
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*/
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u64 cper_next_record_id(void)
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{
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static atomic64_t seq;
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if (!atomic64_read(&seq))
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atomic64_set(&seq, ((u64)get_seconds()) << 32);
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return atomic64_inc_return(&seq);
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}
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EXPORT_SYMBOL_GPL(cper_next_record_id);
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static const char *cper_severity_strs[] = {
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"recoverable",
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"fatal",
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"corrected",
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"info",
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};
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static const char *cper_severity_str(unsigned int severity)
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{
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return severity < ARRAY_SIZE(cper_severity_strs) ?
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cper_severity_strs[severity] : "unknown";
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}
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/*
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* cper_print_bits - print strings for set bits
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* @pfx: prefix for each line, including log level and prefix string
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* @bits: bit mask
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* @strs: string array, indexed by bit position
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* @strs_size: size of the string array: @strs
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*
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* For each set bit in @bits, print the corresponding string in @strs.
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* If the output length is longer than 80, multiple line will be
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* printed, with @pfx is printed at the beginning of each line.
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*/
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void cper_print_bits(const char *pfx, unsigned int bits,
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const char *strs[], unsigned int strs_size)
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{
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int i, len = 0;
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const char *str;
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char buf[84];
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for (i = 0; i < strs_size; i++) {
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if (!(bits & (1U << i)))
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continue;
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str = strs[i];
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if (!str)
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continue;
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if (len && len + strlen(str) + 2 > 80) {
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printk("%s\n", buf);
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len = 0;
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}
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if (!len)
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len = snprintf(buf, sizeof(buf), "%s%s", pfx, str);
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else
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len += snprintf(buf+len, sizeof(buf)-len, ", %s", str);
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}
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if (len)
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printk("%s\n", buf);
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}
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static const char *cper_proc_type_strs[] = {
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"IA32/X64",
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"IA64",
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};
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static const char *cper_proc_isa_strs[] = {
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"IA32",
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"IA64",
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"X64",
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};
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static const char *cper_proc_error_type_strs[] = {
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"cache error",
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"TLB error",
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"bus error",
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"micro-architectural error",
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};
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static const char *cper_proc_op_strs[] = {
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"unknown or generic",
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"data read",
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"data write",
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"instruction execution",
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};
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static const char *cper_proc_flag_strs[] = {
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"restartable",
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"precise IP",
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"overflow",
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"corrected",
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};
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static void cper_print_proc_generic(const char *pfx,
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const struct cper_sec_proc_generic *proc)
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{
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if (proc->validation_bits & CPER_PROC_VALID_TYPE)
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printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type,
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proc->proc_type < ARRAY_SIZE(cper_proc_type_strs) ?
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cper_proc_type_strs[proc->proc_type] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_ISA)
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printk("%s""processor_isa: %d, %s\n", pfx, proc->proc_isa,
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proc->proc_isa < ARRAY_SIZE(cper_proc_isa_strs) ?
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cper_proc_isa_strs[proc->proc_isa] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_ERROR_TYPE) {
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printk("%s""error_type: 0x%02x\n", pfx, proc->proc_error_type);
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cper_print_bits(pfx, proc->proc_error_type,
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cper_proc_error_type_strs,
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ARRAY_SIZE(cper_proc_error_type_strs));
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}
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if (proc->validation_bits & CPER_PROC_VALID_OPERATION)
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printk("%s""operation: %d, %s\n", pfx, proc->operation,
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proc->operation < ARRAY_SIZE(cper_proc_op_strs) ?
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cper_proc_op_strs[proc->operation] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_FLAGS) {
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printk("%s""flags: 0x%02x\n", pfx, proc->flags);
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cper_print_bits(pfx, proc->flags, cper_proc_flag_strs,
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ARRAY_SIZE(cper_proc_flag_strs));
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}
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if (proc->validation_bits & CPER_PROC_VALID_LEVEL)
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printk("%s""level: %d\n", pfx, proc->level);
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if (proc->validation_bits & CPER_PROC_VALID_VERSION)
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printk("%s""version_info: 0x%016llx\n", pfx, proc->cpu_version);
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if (proc->validation_bits & CPER_PROC_VALID_ID)
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printk("%s""processor_id: 0x%016llx\n", pfx, proc->proc_id);
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if (proc->validation_bits & CPER_PROC_VALID_TARGET_ADDRESS)
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printk("%s""target_address: 0x%016llx\n",
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pfx, proc->target_addr);
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if (proc->validation_bits & CPER_PROC_VALID_REQUESTOR_ID)
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printk("%s""requestor_id: 0x%016llx\n",
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pfx, proc->requestor_id);
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if (proc->validation_bits & CPER_PROC_VALID_RESPONDER_ID)
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printk("%s""responder_id: 0x%016llx\n",
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pfx, proc->responder_id);
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if (proc->validation_bits & CPER_PROC_VALID_IP)
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printk("%s""IP: 0x%016llx\n", pfx, proc->ip);
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}
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static const char *cper_mem_err_type_strs[] = {
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"unknown",
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"no error",
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"single-bit ECC",
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"multi-bit ECC",
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"single-symbol chipkill ECC",
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"multi-symbol chipkill ECC",
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"master abort",
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"target abort",
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"parity error",
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"watchdog timeout",
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"invalid address",
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"mirror Broken",
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"memory sparing",
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"scrub corrected error",
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"scrub uncorrected error",
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};
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static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem)
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{
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if (mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS)
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printk("%s""error_status: 0x%016llx\n", pfx, mem->error_status);
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if (mem->validation_bits & CPER_MEM_VALID_PHYSICAL_ADDRESS)
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printk("%s""physical_address: 0x%016llx\n",
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pfx, mem->physical_addr);
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if (mem->validation_bits & CPER_MEM_VALID_PHYSICAL_ADDRESS_MASK)
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printk("%s""physical_address_mask: 0x%016llx\n",
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pfx, mem->physical_addr_mask);
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if (mem->validation_bits & CPER_MEM_VALID_NODE)
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printk("%s""node: %d\n", pfx, mem->node);
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if (mem->validation_bits & CPER_MEM_VALID_CARD)
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printk("%s""card: %d\n", pfx, mem->card);
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if (mem->validation_bits & CPER_MEM_VALID_MODULE)
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printk("%s""module: %d\n", pfx, mem->module);
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if (mem->validation_bits & CPER_MEM_VALID_BANK)
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printk("%s""bank: %d\n", pfx, mem->bank);
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if (mem->validation_bits & CPER_MEM_VALID_DEVICE)
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printk("%s""device: %d\n", pfx, mem->device);
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if (mem->validation_bits & CPER_MEM_VALID_ROW)
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printk("%s""row: %d\n", pfx, mem->row);
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if (mem->validation_bits & CPER_MEM_VALID_COLUMN)
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printk("%s""column: %d\n", pfx, mem->column);
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if (mem->validation_bits & CPER_MEM_VALID_BIT_POSITION)
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printk("%s""bit_position: %d\n", pfx, mem->bit_pos);
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if (mem->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
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printk("%s""requestor_id: 0x%016llx\n", pfx, mem->requestor_id);
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if (mem->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
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printk("%s""responder_id: 0x%016llx\n", pfx, mem->responder_id);
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if (mem->validation_bits & CPER_MEM_VALID_TARGET_ID)
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printk("%s""target_id: 0x%016llx\n", pfx, mem->target_id);
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if (mem->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
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u8 etype = mem->error_type;
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printk("%s""error_type: %d, %s\n", pfx, etype,
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etype < ARRAY_SIZE(cper_mem_err_type_strs) ?
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cper_mem_err_type_strs[etype] : "unknown");
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}
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}
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static const char *cper_pcie_port_type_strs[] = {
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"PCIe end point",
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"legacy PCI end point",
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"unknown",
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"unknown",
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"root port",
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"upstream switch port",
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"downstream switch port",
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"PCIe to PCI/PCI-X bridge",
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"PCI/PCI-X to PCIe bridge",
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"root complex integrated endpoint device",
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"root complex event collector",
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};
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static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie,
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const struct acpi_hest_generic_data *gdata)
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{
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#ifdef CONFIG_ACPI_APEI_PCIEAER
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struct pci_dev *dev;
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#endif
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if (pcie->validation_bits & CPER_PCIE_VALID_PORT_TYPE)
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printk("%s""port_type: %d, %s\n", pfx, pcie->port_type,
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pcie->port_type < ARRAY_SIZE(cper_pcie_port_type_strs) ?
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cper_pcie_port_type_strs[pcie->port_type] : "unknown");
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if (pcie->validation_bits & CPER_PCIE_VALID_VERSION)
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printk("%s""version: %d.%d\n", pfx,
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pcie->version.major, pcie->version.minor);
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if (pcie->validation_bits & CPER_PCIE_VALID_COMMAND_STATUS)
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printk("%s""command: 0x%04x, status: 0x%04x\n", pfx,
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pcie->command, pcie->status);
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if (pcie->validation_bits & CPER_PCIE_VALID_DEVICE_ID) {
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const __u8 *p;
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printk("%s""device_id: %04x:%02x:%02x.%x\n", pfx,
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pcie->device_id.segment, pcie->device_id.bus,
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pcie->device_id.device, pcie->device_id.function);
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printk("%s""slot: %d\n", pfx,
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pcie->device_id.slot >> CPER_PCIE_SLOT_SHIFT);
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printk("%s""secondary_bus: 0x%02x\n", pfx,
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pcie->device_id.secondary_bus);
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printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx,
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pcie->device_id.vendor_id, pcie->device_id.device_id);
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p = pcie->device_id.class_code;
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printk("%s""class_code: %02x%02x%02x\n", pfx, p[0], p[1], p[2]);
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}
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if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER)
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printk("%s""serial number: 0x%04x, 0x%04x\n", pfx,
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pcie->serial_number.lower, pcie->serial_number.upper);
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if (pcie->validation_bits & CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS)
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printk(
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"%s""bridge: secondary_status: 0x%04x, control: 0x%04x\n",
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pfx, pcie->bridge.secondary_status, pcie->bridge.control);
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#ifdef CONFIG_ACPI_APEI_PCIEAER
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dev = pci_get_domain_bus_and_slot(pcie->device_id.segment,
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pcie->device_id.bus, pcie->device_id.function);
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if (!dev) {
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pr_err("PCI AER Cannot get PCI device %04x:%02x:%02x.%d\n",
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pcie->device_id.segment, pcie->device_id.bus,
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pcie->device_id.slot, pcie->device_id.function);
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return;
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}
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if (pcie->validation_bits & CPER_PCIE_VALID_AER_INFO)
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cper_print_aer(pfx, dev, gdata->error_severity,
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(struct aer_capability_regs *) pcie->aer_info);
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pci_dev_put(dev);
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#endif
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}
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static const char *apei_estatus_section_flag_strs[] = {
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"primary",
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"containment warning",
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"reset",
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"threshold exceeded",
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"resource not accessible",
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"latent error",
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};
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static void apei_estatus_print_section(
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const char *pfx, const struct acpi_hest_generic_data *gdata, int sec_no)
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{
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uuid_le *sec_type = (uuid_le *)gdata->section_type;
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__u16 severity;
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severity = gdata->error_severity;
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printk("%s""section: %d, severity: %d, %s\n", pfx, sec_no, severity,
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cper_severity_str(severity));
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printk("%s""flags: 0x%02x\n", pfx, gdata->flags);
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cper_print_bits(pfx, gdata->flags, apei_estatus_section_flag_strs,
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ARRAY_SIZE(apei_estatus_section_flag_strs));
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if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)
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printk("%s""fru_id: %pUl\n", pfx, (uuid_le *)gdata->fru_id);
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if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
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printk("%s""fru_text: %.20s\n", pfx, gdata->fru_text);
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if (!uuid_le_cmp(*sec_type, CPER_SEC_PROC_GENERIC)) {
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struct cper_sec_proc_generic *proc_err = (void *)(gdata + 1);
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printk("%s""section_type: general processor error\n", pfx);
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if (gdata->error_data_length >= sizeof(*proc_err))
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cper_print_proc_generic(pfx, proc_err);
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else
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goto err_section_too_small;
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} else if (!uuid_le_cmp(*sec_type, CPER_SEC_PLATFORM_MEM)) {
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struct cper_sec_mem_err *mem_err = (void *)(gdata + 1);
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printk("%s""section_type: memory error\n", pfx);
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if (gdata->error_data_length >= sizeof(*mem_err))
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cper_print_mem(pfx, mem_err);
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else
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goto err_section_too_small;
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} else if (!uuid_le_cmp(*sec_type, CPER_SEC_PCIE)) {
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struct cper_sec_pcie *pcie = (void *)(gdata + 1);
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printk("%s""section_type: PCIe error\n", pfx);
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if (gdata->error_data_length >= sizeof(*pcie))
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cper_print_pcie(pfx, pcie, gdata);
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else
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goto err_section_too_small;
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} else
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printk("%s""section type: unknown, %pUl\n", pfx, sec_type);
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return;
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err_section_too_small:
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pr_err(FW_WARN "error section length is too small\n");
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}
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void apei_estatus_print(const char *pfx,
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const struct acpi_hest_generic_status *estatus)
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{
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struct acpi_hest_generic_data *gdata;
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unsigned int data_len, gedata_len;
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int sec_no = 0;
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__u16 severity;
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printk("%s""APEI generic hardware error status\n", pfx);
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severity = estatus->error_severity;
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printk("%s""severity: %d, %s\n", pfx, severity,
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cper_severity_str(severity));
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data_len = estatus->data_length;
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gdata = (struct acpi_hest_generic_data *)(estatus + 1);
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while (data_len > sizeof(*gdata)) {
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gedata_len = gdata->error_data_length;
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apei_estatus_print_section(pfx, gdata, sec_no);
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data_len -= gedata_len + sizeof(*gdata);
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gdata = (void *)(gdata + 1) + gedata_len;
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sec_no++;
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}
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}
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EXPORT_SYMBOL_GPL(apei_estatus_print);
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int apei_estatus_check_header(const struct acpi_hest_generic_status *estatus)
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{
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if (estatus->data_length &&
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estatus->data_length < sizeof(struct acpi_hest_generic_data))
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return -EINVAL;
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if (estatus->raw_data_length &&
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estatus->raw_data_offset < sizeof(*estatus) + estatus->data_length)
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return -EINVAL;
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return 0;
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}
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EXPORT_SYMBOL_GPL(apei_estatus_check_header);
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int apei_estatus_check(const struct acpi_hest_generic_status *estatus)
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{
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struct acpi_hest_generic_data *gdata;
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unsigned int data_len, gedata_len;
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int rc;
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rc = apei_estatus_check_header(estatus);
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if (rc)
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return rc;
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data_len = estatus->data_length;
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gdata = (struct acpi_hest_generic_data *)(estatus + 1);
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while (data_len > sizeof(*gdata)) {
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gedata_len = gdata->error_data_length;
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if (gedata_len > data_len - sizeof(*gdata))
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return -EINVAL;
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data_len -= gedata_len + sizeof(*gdata);
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gdata = (void *)(gdata + 1) + gedata_len;
|
|
}
|
|
if (data_len)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(apei_estatus_check);
|