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6c7c324570
Tegra132 use CCROC throttle registers to configure pulse skiper, set these registers to enable throttle function for Tegra132. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
20 lines
553 B
C
20 lines
553 B
C
/*
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* This header provides constants for binding nvidia,tegra124-soctherm.
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*/
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#ifndef _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H
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#define _DT_BINDINGS_THERMAL_TEGRA124_SOCTHERM_H
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#define TEGRA124_SOCTHERM_SENSOR_CPU 0
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#define TEGRA124_SOCTHERM_SENSOR_MEM 1
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#define TEGRA124_SOCTHERM_SENSOR_GPU 2
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#define TEGRA124_SOCTHERM_SENSOR_PLLX 3
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#define TEGRA124_SOCTHERM_SENSOR_NUM 4
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#define TEGRA_SOCTHERM_THROT_LEVEL_LOW 0
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#define TEGRA_SOCTHERM_THROT_LEVEL_MED 1
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#define TEGRA_SOCTHERM_THROT_LEVEL_HIGH 2
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#define TEGRA_SOCTHERM_THROT_LEVEL_NONE -1
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#endif
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