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76884679c6
Changes include: * New support for 88e1145 * New support for 88e111s * Fixing 88e1101 driver to not match non-88e1101 PHYs * Increases in feature support across Marvell PHY product line * Fixes a bunch of whitespace issues found by Lindent Signed-off-by: Andrew Fleming <afleming@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
270 lines
5.8 KiB
C
270 lines
5.8 KiB
C
/*
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* drivers/net/phy/marvell.c
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*
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* Driver for Marvell PHYs
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*
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* Author: Andy Fleming
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/phy.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/uaccess.h>
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#define MII_M1011_IEVENT 0x13
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#define MII_M1011_IEVENT_CLEAR 0x0000
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#define MII_M1011_IMASK 0x12
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#define MII_M1011_IMASK_INIT 0x6400
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#define MII_M1011_IMASK_CLEAR 0x0000
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#define MII_M1011_PHY_SCR 0x10
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#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
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#define MII_M1145_PHY_EXT_CR 0x14
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#define MII_M1145_RGMII_RX_DELAY 0x0080
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#define MII_M1145_RGMII_TX_DELAY 0x0002
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#define M1145_DEV_FLAGS_RESISTANCE 0x00000001
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#define MII_M1111_PHY_LED_CONTROL 0x18
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#define MII_M1111_PHY_LED_DIRECT 0x4100
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#define MII_M1111_PHY_LED_COMBINE 0x411c
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MODULE_DESCRIPTION("Marvell PHY driver");
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MODULE_AUTHOR("Andy Fleming");
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MODULE_LICENSE("GPL");
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static int marvell_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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/* Clear the interrupts by reading the reg */
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err = phy_read(phydev, MII_M1011_IEVENT);
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if (err < 0)
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return err;
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return 0;
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}
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static int marvell_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
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else
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err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
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return err;
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}
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static int marvell_config_aneg(struct phy_device *phydev)
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{
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int err;
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/* The Marvell PHY has an errata which requires
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* that certain registers get written in order
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* to restart autonegotiation */
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x1f);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x200c);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x5);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x100);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1011_PHY_SCR,
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MII_M1011_PHY_SCR_AUTO_CROSS);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
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MII_M1111_PHY_LED_DIRECT);
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if (err < 0)
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return err;
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err = genphy_config_aneg(phydev);
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return err;
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}
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static int m88e1145_config_init(struct phy_device *phydev)
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{
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int err;
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/* Take care of errata E0 & E1 */
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err = phy_write(phydev, 0x1d, 0x001b);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x418f);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x0016);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0xa2da);
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if (err < 0)
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return err;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII) {
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int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
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if (temp < 0)
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return temp;
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temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
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err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
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if (err < 0)
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return err;
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if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
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err = phy_write(phydev, 0x1d, 0x0012);
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if (err < 0)
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return err;
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temp = phy_read(phydev, 0x1e);
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if (temp < 0)
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return temp;
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temp &= 0xf03f;
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temp |= 2 << 9; /* 36 ohm */
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temp |= 2 << 6; /* 39 ohm */
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err = phy_write(phydev, 0x1e, temp);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1d, 0x3);
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if (err < 0)
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return err;
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err = phy_write(phydev, 0x1e, 0x8000);
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if (err < 0)
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return err;
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}
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}
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return 0;
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}
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static struct phy_driver m88e1101_driver = {
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.phy_id = 0x01410c60,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1101",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &marvell_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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.driver = {.owner = THIS_MODULE,},
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};
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static struct phy_driver m88e1111s_driver = {
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.phy_id = 0x01410cc0,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1111",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &marvell_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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.driver = {.owner = THIS_MODULE,},
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};
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static struct phy_driver m88e1145_driver = {
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.phy_id = 0x01410cd0,
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.phy_id_mask = 0xfffffff0,
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.name = "Marvell 88E1145",
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_init = &m88e1145_config_init,
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.config_aneg = &marvell_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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.driver = {.owner = THIS_MODULE,},
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};
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static int __init marvell_init(void)
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{
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int ret;
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ret = phy_driver_register(&m88e1101_driver);
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if (ret)
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return ret;
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ret = phy_driver_register(&m88e1111s_driver);
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if (ret)
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goto err1111s;
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ret = phy_driver_register(&m88e1145_driver);
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if (ret)
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goto err1145;
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return 0;
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err1145:
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phy_driver_unregister(&m88e1111s_driver);
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err1111s:
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phy_driver_unregister(&m88e1101_driver);
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return ret;
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}
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static void __exit marvell_exit(void)
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{
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phy_driver_unregister(&m88e1101_driver);
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phy_driver_unregister(&m88e1111s_driver);
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phy_driver_unregister(&m88e1145_driver);
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}
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module_init(marvell_init);
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module_exit(marvell_exit);
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