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3eb0c5f4b5
USB (OHCI) Host driver for S3C2410/S3C2440 based systems Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
925 lines
26 KiB
C
925 lines
26 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
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*
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* [ Initialisation is based on Linus' ]
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* [ uhci code and gregs ohci fragments ]
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* [ (C) Copyright 1999 Linus Torvalds ]
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* [ (C) Copyright 1999 Gregory P. Smith]
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*
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*
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* OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
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* interfaces (though some non-x86 Intel chips use it). It supports
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* smarter hardware than UHCI. A download link for the spec available
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* through the http://www.usb.org website.
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*
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* History:
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*
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* 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
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* 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
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* 2003/02/24 show registers in sysfs (Kevin Brosius)
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*
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* 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
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* bandwidth accounting; if debugging, show schedules in driverfs
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* 2002/07/19 fixes to management of ED and schedule state.
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* 2002/06/09 SA-1111 support (Christopher Hoover)
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* 2002/06/01 remember frame when HC won't see EDs any more; use that info
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* to fix urb unlink races caused by interrupt latency assumptions;
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* minor ED field and function naming updates
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* 2002/01/18 package as a patch for 2.5.3; this should match the
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* 2.4.17 kernel modulo some bugs being fixed.
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*
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* 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
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* from post-2.4.5 patches.
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* 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
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* 2001/09/07 match PCI PM changes, errnos from Linus' tree
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* 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
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* pbook pci quirks gone (please fix pbook pci sw!) (db)
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*
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* 2001/04/08 Identify version on module load (gb)
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* 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
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pci_map_single (db)
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* 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
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* 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
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*
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* 2000/09/26 fixed races in removing the private portion of the urb
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* 2000/09/07 disable bulk and control lists when unlinking the last
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* endpoint descriptor in order to avoid unrecoverable errors on
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* the Lucent chips. (rwc@sgi)
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* 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
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* urb unlink probs, indentation fixes
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* 2000/08/11 various oops fixes mostly affecting iso and cleanup from
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* device unplugs.
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* 2000/06/28 use PCI hotplug framework, for better power management
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* and for Cardbus support (David Brownell)
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* 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
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* when the controller loses power; handle UE; cleanup; ...
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*
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* v5.2 1999/12/07 URB 3rd preview,
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* v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
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* v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
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* i386: HUB, Keyboard, Mouse, Printer
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*
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* v4.3 1999/10/27 multiple HCs, bulk_request
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* v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
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* v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
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* v4.0 1999/08/18
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* v3.0 1999/06/25
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* v2.1 1999/05/09 code clean up
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* v2.0 1999/05/04
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* v1.0 1999/04/27 initial release
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*
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* This file is licenced under the GPL.
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*/
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#include <linux/config.h>
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#ifdef CONFIG_USB_DEBUG
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# define DEBUG
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#else
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# undef DEBUG
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#endif
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/smp_lock.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/timer.h>
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#include <linux/list.h>
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#include <linux/usb.h>
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#include <linux/usb_otg.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmapool.h>
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#include <linux/reboot.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/unaligned.h>
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#include <asm/byteorder.h>
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#include "../core/hcd.h"
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#define DRIVER_VERSION "2005 April 22"
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#define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
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#define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
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/*-------------------------------------------------------------------------*/
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// #define OHCI_VERBOSE_DEBUG /* not always helpful */
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/* For initializing controller (mask in an HCFS mode too) */
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#define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
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#define OHCI_INTR_INIT \
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(OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
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#ifdef __hppa__
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/* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
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#define IR_DISABLE
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#endif
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#ifdef CONFIG_ARCH_OMAP
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/* OMAP doesn't support IR (no SMM; not needed) */
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#define IR_DISABLE
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#endif
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/*-------------------------------------------------------------------------*/
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static const char hcd_name [] = "ohci_hcd";
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#include "ohci.h"
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static void ohci_dump (struct ohci_hcd *ohci, int verbose);
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static int ohci_init (struct ohci_hcd *ohci);
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static void ohci_stop (struct usb_hcd *hcd);
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static int ohci_reboot (struct notifier_block *, unsigned long , void *);
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#include "ohci-hub.c"
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#include "ohci-dbg.c"
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#include "ohci-mem.c"
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#include "ohci-q.c"
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/*
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* On architectures with edge-triggered interrupts we must never return
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* IRQ_NONE.
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*/
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#if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
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#define IRQ_NOTMINE IRQ_HANDLED
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#else
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#define IRQ_NOTMINE IRQ_NONE
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#endif
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/* Some boards misreport power switching/overcurrent */
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static int distrust_firmware = 1;
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module_param (distrust_firmware, bool, 0);
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MODULE_PARM_DESC (distrust_firmware,
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"true to distrust firmware power/overcurrent setup");
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/* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
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static int no_handshake = 0;
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module_param (no_handshake, bool, 0);
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MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
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/*-------------------------------------------------------------------------*/
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/*
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* queue up an urb for anything except the root hub
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*/
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static int ohci_urb_enqueue (
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struct usb_hcd *hcd,
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struct usb_host_endpoint *ep,
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struct urb *urb,
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unsigned mem_flags
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) {
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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struct ed *ed;
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urb_priv_t *urb_priv;
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unsigned int pipe = urb->pipe;
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int i, size = 0;
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unsigned long flags;
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int retval = 0;
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#ifdef OHCI_VERBOSE_DEBUG
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urb_print (urb, "SUB", usb_pipein (pipe));
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#endif
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/* every endpoint has a ed, locate and maybe (re)initialize it */
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if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
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return -ENOMEM;
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/* for the private part of the URB we need the number of TDs (size) */
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switch (ed->type) {
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case PIPE_CONTROL:
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/* td_submit_urb() doesn't yet handle these */
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if (urb->transfer_buffer_length > 4096)
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return -EMSGSIZE;
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/* 1 TD for setup, 1 for ACK, plus ... */
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size = 2;
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/* FALLTHROUGH */
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// case PIPE_INTERRUPT:
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// case PIPE_BULK:
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default:
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/* one TD for every 4096 Bytes (can be upto 8K) */
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size += urb->transfer_buffer_length / 4096;
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/* ... and for any remaining bytes ... */
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if ((urb->transfer_buffer_length % 4096) != 0)
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size++;
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/* ... and maybe a zero length packet to wrap it up */
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if (size == 0)
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size++;
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else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
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&& (urb->transfer_buffer_length
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% usb_maxpacket (urb->dev, pipe,
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usb_pipeout (pipe))) == 0)
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size++;
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break;
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case PIPE_ISOCHRONOUS: /* number of packets from URB */
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size = urb->number_of_packets;
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break;
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}
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/* allocate the private part of the URB */
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urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
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mem_flags);
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if (!urb_priv)
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return -ENOMEM;
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memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
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INIT_LIST_HEAD (&urb_priv->pending);
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urb_priv->length = size;
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urb_priv->ed = ed;
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/* allocate the TDs (deferring hash chain updates) */
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for (i = 0; i < size; i++) {
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urb_priv->td [i] = td_alloc (ohci, mem_flags);
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if (!urb_priv->td [i]) {
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urb_priv->length = i;
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urb_free_priv (ohci, urb_priv);
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return -ENOMEM;
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}
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}
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spin_lock_irqsave (&ohci->lock, flags);
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/* don't submit to a dead HC */
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if (!HC_IS_RUNNING(hcd->state)) {
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retval = -ENODEV;
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goto fail;
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}
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/* in case of unlink-during-submit */
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spin_lock (&urb->lock);
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if (urb->status != -EINPROGRESS) {
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spin_unlock (&urb->lock);
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urb->hcpriv = urb_priv;
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finish_urb (ohci, urb, NULL);
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retval = 0;
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goto fail;
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}
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/* schedule the ed if needed */
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if (ed->state == ED_IDLE) {
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retval = ed_schedule (ohci, ed);
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if (retval < 0)
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goto fail0;
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if (ed->type == PIPE_ISOCHRONOUS) {
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u16 frame = ohci_frame_no(ohci);
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/* delay a few frames before the first TD */
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frame += max_t (u16, 8, ed->interval);
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frame &= ~(ed->interval - 1);
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frame |= ed->branch;
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urb->start_frame = frame;
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/* yes, only URB_ISO_ASAP is supported, and
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* urb->start_frame is never used as input.
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*/
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}
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} else if (ed->type == PIPE_ISOCHRONOUS)
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urb->start_frame = ed->last_iso + ed->interval;
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/* fill the TDs and link them to the ed; and
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* enable that part of the schedule, if needed
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* and update count of queued periodic urbs
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*/
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urb->hcpriv = urb_priv;
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td_submit_urb (ohci, urb);
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fail0:
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spin_unlock (&urb->lock);
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fail:
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if (retval)
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urb_free_priv (ohci, urb_priv);
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spin_unlock_irqrestore (&ohci->lock, flags);
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return retval;
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}
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/*
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* decouple the URB from the HC queues (TDs, urb_priv); it's
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* already marked using urb->status. reporting is always done
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* asynchronously, and we might be dealing with an urb that's
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* partially transferred, or an ED with other urbs being unlinked.
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*/
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static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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unsigned long flags;
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#ifdef OHCI_VERBOSE_DEBUG
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urb_print (urb, "UNLINK", 1);
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#endif
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spin_lock_irqsave (&ohci->lock, flags);
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if (HC_IS_RUNNING(hcd->state)) {
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urb_priv_t *urb_priv;
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/* Unless an IRQ completed the unlink while it was being
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* handed to us, flag it for unlink and giveback, and force
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* some upcoming INTR_SF to call finish_unlinks()
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*/
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urb_priv = urb->hcpriv;
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if (urb_priv) {
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if (urb_priv->ed->state == ED_OPER)
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start_ed_unlink (ohci, urb_priv->ed);
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}
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} else {
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/*
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* with HC dead, we won't respect hc queue pointers
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* any more ... just clean up every urb's memory.
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*/
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if (urb->hcpriv)
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finish_urb (ohci, urb, NULL);
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}
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spin_unlock_irqrestore (&ohci->lock, flags);
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return 0;
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}
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/*-------------------------------------------------------------------------*/
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/* frees config/altsetting state for endpoints,
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* including ED memory, dummy TD, and bulk/intr data toggle
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*/
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static void
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ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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unsigned long flags;
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struct ed *ed = ep->hcpriv;
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unsigned limit = 1000;
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/* ASSERT: any requests/urbs are being unlinked */
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/* ASSERT: nobody can be submitting urbs for this any more */
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if (!ed)
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return;
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rescan:
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spin_lock_irqsave (&ohci->lock, flags);
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if (!HC_IS_RUNNING (hcd->state)) {
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sanitize:
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ed->state = ED_IDLE;
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finish_unlinks (ohci, 0, NULL);
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}
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switch (ed->state) {
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case ED_UNLINK: /* wait for hw to finish? */
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/* major IRQ delivery trouble loses INTR_SF too... */
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if (limit-- == 0) {
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ohci_warn (ohci, "IRQ INTR_SF lossage\n");
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goto sanitize;
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}
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spin_unlock_irqrestore (&ohci->lock, flags);
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set_current_state (TASK_UNINTERRUPTIBLE);
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schedule_timeout (1);
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goto rescan;
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case ED_IDLE: /* fully unlinked */
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if (list_empty (&ed->td_list)) {
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td_free (ohci, ed->dummy);
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ed_free (ohci, ed);
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break;
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}
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/* else FALL THROUGH */
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default:
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/* caller was supposed to have unlinked any requests;
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* that's not our job. can't recover; must leak ed.
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*/
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ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
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ed, ep->desc.bEndpointAddress, ed->state,
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list_empty (&ed->td_list) ? "" : " (has tds)");
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td_free (ohci, ed->dummy);
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break;
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}
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ep->hcpriv = NULL;
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spin_unlock_irqrestore (&ohci->lock, flags);
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return;
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}
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static int ohci_get_frame (struct usb_hcd *hcd)
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{
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struct ohci_hcd *ohci = hcd_to_ohci (hcd);
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return ohci_frame_no(ohci);
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}
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static void ohci_usb_reset (struct ohci_hcd *ohci)
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{
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ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
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ohci->hc_control &= OHCI_CTRL_RWC;
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ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
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}
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/* reboot notifier forcibly disables IRQs and DMA, helping kexec and
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* other cases where the next software may expect clean state from the
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* "firmware". this is bus-neutral, unlike shutdown() methods.
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*/
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static int
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ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
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{
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struct ohci_hcd *ohci;
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ohci = container_of (block, struct ohci_hcd, reboot_notifier);
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ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
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ohci_usb_reset (ohci);
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/* flush the writes */
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(void) ohci_readl (ohci, &ohci->regs->control);
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return 0;
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}
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/*-------------------------------------------------------------------------*
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* HC functions
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*-------------------------------------------------------------------------*/
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/* init memory, and kick BIOS/SMM off */
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static int ohci_init (struct ohci_hcd *ohci)
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{
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int ret;
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disable (ohci);
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ohci->regs = ohci_to_hcd(ohci)->regs;
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ohci->next_statechange = jiffies;
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#ifndef IR_DISABLE
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/* SMM owns the HC? not for long! */
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if (!no_handshake && ohci_readl (ohci,
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&ohci->regs->control) & OHCI_CTRL_IR) {
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u32 temp;
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ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
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/* this timeout is arbitrary. we make it long, so systems
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* depending on usb keyboards may be usable even if the
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* BIOS/SMM code seems pretty broken.
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*/
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temp = 500; /* arbitrary: five seconds */
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ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
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ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
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while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
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msleep (10);
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if (--temp == 0) {
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ohci_err (ohci, "USB HC takeover failed!"
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" (BIOS/SMM bug)\n");
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return -EBUSY;
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}
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}
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ohci_usb_reset (ohci);
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}
|
|
#endif
|
|
|
|
/* Disable HC interrupts */
|
|
ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
|
|
// flush the writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
|
|
if (ohci->hcca)
|
|
return 0;
|
|
|
|
ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
|
|
sizeof *ohci->hcca, &ohci->hcca_dma, 0);
|
|
if (!ohci->hcca)
|
|
return -ENOMEM;
|
|
|
|
if ((ret = ohci_mem_init (ohci)) < 0)
|
|
ohci_stop (ohci_to_hcd(ohci));
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* Start an OHCI controller, set the BUS operational
|
|
* resets USB and controller
|
|
* enable interrupts
|
|
*/
|
|
static int ohci_run (struct ohci_hcd *ohci)
|
|
{
|
|
u32 mask, temp;
|
|
int first = ohci->fminterval == 0;
|
|
|
|
disable (ohci);
|
|
|
|
/* boot firmware should have set this up (5.1.1.3.1) */
|
|
if (first) {
|
|
|
|
temp = ohci_readl (ohci, &ohci->regs->fminterval);
|
|
ohci->fminterval = temp & 0x3fff;
|
|
if (ohci->fminterval != FI)
|
|
ohci_dbg (ohci, "fminterval delta %d\n",
|
|
ohci->fminterval - FI);
|
|
ohci->fminterval |= FSMP (ohci->fminterval) << 16;
|
|
/* also: power/overcurrent flags in roothub.a */
|
|
}
|
|
|
|
/* Reset USB nearly "by the book". RemoteWakeupConnected
|
|
* saved if boot firmware (BIOS/SMM/...) told us it's connected
|
|
* (for OHCI integrated on mainboard, it normally is)
|
|
*/
|
|
ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
|
|
ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
|
|
hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
|
|
ohci->hc_control);
|
|
|
|
if (ohci->hc_control & OHCI_CTRL_RWC
|
|
&& !(ohci->flags & OHCI_QUIRK_AMD756))
|
|
ohci_to_hcd(ohci)->can_wakeup = 1;
|
|
|
|
switch (ohci->hc_control & OHCI_CTRL_HCFS) {
|
|
case OHCI_USB_OPER:
|
|
temp = 0;
|
|
break;
|
|
case OHCI_USB_SUSPEND:
|
|
case OHCI_USB_RESUME:
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_USB_RESUME;
|
|
temp = 10 /* msec wait */;
|
|
break;
|
|
// case OHCI_USB_RESET:
|
|
default:
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_USB_RESET;
|
|
temp = 50 /* msec wait */;
|
|
break;
|
|
}
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
// flush the writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
msleep(temp);
|
|
temp = roothub_a (ohci);
|
|
if (!(temp & RH_A_NPS)) {
|
|
unsigned ports = temp & RH_A_NDP;
|
|
|
|
/* power down each port */
|
|
for (temp = 0; temp < ports; temp++)
|
|
ohci_writel (ohci, RH_PS_LSDA,
|
|
&ohci->regs->roothub.portstatus [temp]);
|
|
}
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
|
|
|
|
/* 2msec timelimit here means no irqs/preempt */
|
|
spin_lock_irq (&ohci->lock);
|
|
|
|
retry:
|
|
/* HC Reset requires max 10 us delay */
|
|
ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
|
|
temp = 30; /* ... allow extra time */
|
|
while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
|
|
if (--temp == 0) {
|
|
spin_unlock_irq (&ohci->lock);
|
|
ohci_err (ohci, "USB HC reset timed out!\n");
|
|
return -1;
|
|
}
|
|
udelay (1);
|
|
}
|
|
|
|
/* now we're in the SUSPEND state ... must go OPERATIONAL
|
|
* within 2msec else HC enters RESUME
|
|
*
|
|
* ... but some hardware won't init fmInterval "by the book"
|
|
* (SiS, OPTi ...), so reset again instead. SiS doesn't need
|
|
* this if we write fmInterval after we're OPERATIONAL.
|
|
* Unclear about ALi, ServerWorks, and others ... this could
|
|
* easily be a longstanding bug in chip init on Linux.
|
|
*/
|
|
if (ohci->flags & OHCI_QUIRK_INITRESET) {
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
}
|
|
|
|
/* Tell the controller where the control and bulk lists are
|
|
* The lists are empty now. */
|
|
ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
|
|
ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
|
|
|
|
/* a reset clears this */
|
|
ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
|
|
|
|
periodic_reinit (ohci);
|
|
|
|
/* some OHCI implementations are finicky about how they init.
|
|
* bogus values here mean not even enumeration could work.
|
|
*/
|
|
if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
|
|
|| !ohci_readl (ohci, &ohci->regs->periodicstart)) {
|
|
if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
|
|
ohci->flags |= OHCI_QUIRK_INITRESET;
|
|
ohci_dbg (ohci, "enabling initreset quirk\n");
|
|
goto retry;
|
|
}
|
|
spin_unlock_irq (&ohci->lock);
|
|
ohci_err (ohci, "init err (%08x %04x)\n",
|
|
ohci_readl (ohci, &ohci->regs->fminterval),
|
|
ohci_readl (ohci, &ohci->regs->periodicstart));
|
|
return -EOVERFLOW;
|
|
}
|
|
|
|
/* start controller operations */
|
|
ohci->hc_control &= OHCI_CTRL_RWC;
|
|
ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
|
|
ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
|
|
ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
|
|
|
|
/* wake on ConnectStatusChange, matching external hubs */
|
|
ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
|
|
|
|
/* Choose the interrupts we care about now, others later on demand */
|
|
mask = OHCI_INTR_INIT;
|
|
ohci_writel (ohci, mask, &ohci->regs->intrstatus);
|
|
ohci_writel (ohci, mask, &ohci->regs->intrenable);
|
|
|
|
/* handle root hub init quirks ... */
|
|
temp = roothub_a (ohci);
|
|
temp &= ~(RH_A_PSM | RH_A_OCPM);
|
|
if (ohci->flags & OHCI_QUIRK_SUPERIO) {
|
|
/* NSC 87560 and maybe others */
|
|
temp |= RH_A_NOCP;
|
|
temp &= ~(RH_A_POTPGT | RH_A_NPS);
|
|
ohci_writel (ohci, temp, &ohci->regs->roothub.a);
|
|
} else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
|
|
/* hub power always on; required for AMD-756 and some
|
|
* Mac platforms. ganged overcurrent reporting, if any.
|
|
*/
|
|
temp |= RH_A_NPS;
|
|
ohci_writel (ohci, temp, &ohci->regs->roothub.a);
|
|
}
|
|
ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
|
|
ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
|
|
&ohci->regs->roothub.b);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
|
|
spin_unlock_irq (&ohci->lock);
|
|
|
|
// POTPGT delay is bits 24-31, in 2 ms units.
|
|
mdelay ((temp >> 23) & 0x1fe);
|
|
ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
|
|
|
|
ohci_dump (ohci, 1);
|
|
|
|
if (ohci_to_hcd(ohci)->self.root_hub == NULL) {
|
|
register_reboot_notifier (&ohci->reboot_notifier);
|
|
create_debug_files (ohci);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* an interrupt happens */
|
|
|
|
static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
|
|
{
|
|
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
|
|
struct ohci_regs __iomem *regs = ohci->regs;
|
|
int ints;
|
|
|
|
/* we can eliminate a (slow) ohci_readl()
|
|
if _only_ WDH caused this irq */
|
|
if ((ohci->hcca->done_head != 0)
|
|
&& ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
|
|
& 0x01)) {
|
|
ints = OHCI_INTR_WDH;
|
|
|
|
/* cardbus/... hardware gone before remove() */
|
|
} else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) {
|
|
disable (ohci);
|
|
ohci_dbg (ohci, "device removed!\n");
|
|
return IRQ_HANDLED;
|
|
|
|
/* interrupt for some other device? */
|
|
} else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) {
|
|
return IRQ_NOTMINE;
|
|
}
|
|
|
|
if (ints & OHCI_INTR_UE) {
|
|
disable (ohci);
|
|
ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
|
|
// e.g. due to PCI Master/Target Abort
|
|
|
|
ohci_dump (ohci, 1);
|
|
ohci_usb_reset (ohci);
|
|
}
|
|
|
|
if (ints & OHCI_INTR_RD) {
|
|
ohci_vdbg (ohci, "resume detect\n");
|
|
if (hcd->state != HC_STATE_QUIESCING)
|
|
schedule_work(&ohci->rh_resume);
|
|
}
|
|
|
|
if (ints & OHCI_INTR_WDH) {
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable);
|
|
spin_lock (&ohci->lock);
|
|
dl_done_list (ohci, ptregs);
|
|
spin_unlock (&ohci->lock);
|
|
if (HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable);
|
|
}
|
|
|
|
/* could track INTR_SO to reduce available PCI/... bandwidth */
|
|
|
|
/* handle any pending URB/ED unlinks, leaving INTR_SF enabled
|
|
* when there's still unlinking to be done (next frame).
|
|
*/
|
|
spin_lock (&ohci->lock);
|
|
if (ohci->ed_rm_list)
|
|
finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
|
|
if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
|
|
&& HC_IS_RUNNING(hcd->state))
|
|
ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable);
|
|
spin_unlock (&ohci->lock);
|
|
|
|
if (HC_IS_RUNNING(hcd->state)) {
|
|
ohci_writel (ohci, ints, ®s->intrstatus);
|
|
ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable);
|
|
// flush those writes
|
|
(void) ohci_readl (ohci, &ohci->regs->control);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static void ohci_stop (struct usb_hcd *hcd)
|
|
{
|
|
struct ohci_hcd *ohci = hcd_to_ohci (hcd);
|
|
|
|
ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
|
|
hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
|
|
hcd->state);
|
|
ohci_dump (ohci, 1);
|
|
|
|
flush_scheduled_work();
|
|
|
|
ohci_usb_reset (ohci);
|
|
ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
|
|
|
|
remove_debug_files (ohci);
|
|
unregister_reboot_notifier (&ohci->reboot_notifier);
|
|
ohci_mem_cleanup (ohci);
|
|
if (ohci->hcca) {
|
|
dma_free_coherent (hcd->self.controller,
|
|
sizeof *ohci->hcca,
|
|
ohci->hcca, ohci->hcca_dma);
|
|
ohci->hcca = NULL;
|
|
ohci->hcca_dma = 0;
|
|
}
|
|
}
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
/* must not be called from interrupt context */
|
|
|
|
#if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM)
|
|
|
|
static int ohci_restart (struct ohci_hcd *ohci)
|
|
{
|
|
int temp;
|
|
int i;
|
|
struct urb_priv *priv;
|
|
struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub;
|
|
|
|
/* mark any devices gone, so they do nothing till khubd disconnects.
|
|
* recycle any "live" eds/tds (and urbs) right away.
|
|
* later, khubd disconnect processing will recycle the other state,
|
|
* (either as disconnect/reconnect, or maybe someday as a reset).
|
|
*/
|
|
spin_lock_irq(&ohci->lock);
|
|
disable (ohci);
|
|
for (i = 0; i < root->maxchild; i++) {
|
|
if (root->children [i])
|
|
usb_set_device_state (root->children[i],
|
|
USB_STATE_NOTATTACHED);
|
|
}
|
|
if (!list_empty (&ohci->pending))
|
|
ohci_dbg(ohci, "abort schedule...\n");
|
|
list_for_each_entry (priv, &ohci->pending, pending) {
|
|
struct urb *urb = priv->td[0]->urb;
|
|
struct ed *ed = priv->ed;
|
|
|
|
switch (ed->state) {
|
|
case ED_OPER:
|
|
ed->state = ED_UNLINK;
|
|
ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
|
|
ed_deschedule (ohci, ed);
|
|
|
|
ed->ed_next = ohci->ed_rm_list;
|
|
ed->ed_prev = NULL;
|
|
ohci->ed_rm_list = ed;
|
|
/* FALLTHROUGH */
|
|
case ED_UNLINK:
|
|
break;
|
|
default:
|
|
ohci_dbg(ohci, "bogus ed %p state %d\n",
|
|
ed, ed->state);
|
|
}
|
|
|
|
spin_lock (&urb->lock);
|
|
urb->status = -ESHUTDOWN;
|
|
spin_unlock (&urb->lock);
|
|
}
|
|
finish_unlinks (ohci, 0, NULL);
|
|
spin_unlock_irq(&ohci->lock);
|
|
|
|
/* paranoia, in case that didn't work: */
|
|
|
|
/* empty the interrupt branches */
|
|
for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
|
|
for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
|
|
|
|
/* no EDs to remove */
|
|
ohci->ed_rm_list = NULL;
|
|
|
|
/* empty control and bulk lists */
|
|
ohci->ed_controltail = NULL;
|
|
ohci->ed_bulktail = NULL;
|
|
|
|
if ((temp = ohci_run (ohci)) < 0) {
|
|
ohci_err (ohci, "can't restart, %d\n", temp);
|
|
return temp;
|
|
} else {
|
|
/* here we "know" root ports should always stay powered,
|
|
* and that if we try to turn them back on the root hub
|
|
* will respond to CSC processing.
|
|
*/
|
|
i = roothub_a (ohci) & RH_A_NDP;
|
|
while (i--)
|
|
ohci_writel (ohci, RH_PS_PSS,
|
|
&ohci->regs->roothub.portstatus [temp]);
|
|
ohci_dbg (ohci, "restart complete\n");
|
|
}
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
|
|
|
|
MODULE_AUTHOR (DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION (DRIVER_INFO);
|
|
MODULE_LICENSE ("GPL");
|
|
|
|
#ifdef CONFIG_PCI
|
|
#include "ohci-pci.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_SA1111
|
|
#include "ohci-sa1111.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_S3C2410
|
|
#include "ohci-s3c2410.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_OMAP
|
|
#include "ohci-omap.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_LH7A404
|
|
#include "ohci-lh7a404.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_PXA27x
|
|
#include "ohci-pxa27x.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_SOC_AU1X00
|
|
#include "ohci-au1xxx.c"
|
|
#endif
|
|
|
|
#ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
|
|
#include "ohci-ppc-soc.c"
|
|
#endif
|
|
|
|
#if !(defined(CONFIG_PCI) \
|
|
|| defined(CONFIG_SA1111) \
|
|
|| defined(CONFIG_ARCH_S3C2410) \
|
|
|| defined(CONFIG_ARCH_OMAP) \
|
|
|| defined (CONFIG_ARCH_LH7A404) \
|
|
|| defined (CONFIG_PXA27x) \
|
|
|| defined (CONFIG_SOC_AU1X00) \
|
|
|| defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
|
|
)
|
|
#error "missing bus glue for ohci-hcd"
|
|
#endif
|