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21440d3133
This updates the DMA API documentation to address a few issues: - The dma_map_sg() call results are used like pci_map_sg() results: using sg_dma_address() and sg_dma_len(). That's not wholly obvious to folk reading _only_ the "new" DMA-API.txt writeup. - Buffers allocated by dma_alloc_coherent() may not be completely free of coherency concerns ... some CPUs also have write buffers that may need to be flushed. - Cacheline coherence issues are now mentioned as being among issues which affect dma buffers, and complicate/prevent using of static and (especially) stack based buffers with the DMA calls. I don't think many drivers currently need to worry about flushing write buffers, but I did hit it with one SOC using external SDRAM for DMA descriptors: without explicit writebuffer flushing, the on-chip DMA controller accessed descriptors before the CPU completed the writes. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
890 lines
32 KiB
Plaintext
890 lines
32 KiB
Plaintext
Dynamic DMA mapping
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===================
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David S. Miller <davem@redhat.com>
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Richard Henderson <rth@cygnus.com>
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Jakub Jelinek <jakub@redhat.com>
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This document describes the DMA mapping system in terms of the pci_
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API. For a similar API that works for generic devices, see
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DMA-API.txt.
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Most of the 64bit platforms have special hardware that translates bus
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addresses (DMA addresses) into physical addresses. This is similar to
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how page tables and/or a TLB translates virtual addresses to physical
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addresses on a CPU. This is needed so that e.g. PCI devices can
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access with a Single Address Cycle (32bit DMA address) any page in the
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64bit physical address space. Previously in Linux those 64bit
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platforms had to set artificial limits on the maximum RAM size in the
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system, so that the virt_to_bus() static scheme works (the DMA address
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translation tables were simply filled on bootup to map each bus
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address to the physical page __pa(bus_to_virt())).
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So that Linux can use the dynamic DMA mapping, it needs some help from the
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drivers, namely it has to take into account that DMA addresses should be
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mapped only for the time they are actually used and unmapped after the DMA
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transfer.
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The following API will work of course even on platforms where no such
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hardware exists, see e.g. include/asm-i386/pci.h for how it is implemented on
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top of the virt_to_bus interface.
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First of all, you should make sure
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#include <linux/pci.h>
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is in your driver. This file will obtain for you the definition of the
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dma_addr_t (which can hold any valid DMA address for the platform)
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type which should be used everywhere you hold a DMA (bus) address
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returned from the DMA mapping functions.
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What memory is DMA'able?
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The first piece of information you must know is what kernel memory can
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be used with the DMA mapping facilities. There has been an unwritten
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set of rules regarding this, and this text is an attempt to finally
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write them down.
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If you acquired your memory via the page allocator
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(i.e. __get_free_page*()) or the generic memory allocators
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(i.e. kmalloc() or kmem_cache_alloc()) then you may DMA to/from
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that memory using the addresses returned from those routines.
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This means specifically that you may _not_ use the memory/addresses
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returned from vmalloc() for DMA. It is possible to DMA to the
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_underlying_ memory mapped into a vmalloc() area, but this requires
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walking page tables to get the physical addresses, and then
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translating each of those pages back to a kernel address using
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something like __va(). [ EDIT: Update this when we integrate
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Gerd Knorr's generic code which does this. ]
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This rule also means that you may use neither kernel image addresses
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(items in data/text/bss segments), nor module image addresses, nor
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stack addresses for DMA. These could all be mapped somewhere entirely
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different than the rest of physical memory. Even if those classes of
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memory could physically work with DMA, you'd need to ensure the I/O
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buffers were cacheline-aligned. Without that, you'd see cacheline
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sharing problems (data corruption) on CPUs with DMA-incoherent caches.
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(The CPU could write to one word, DMA would write to a different one
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in the same cache line, and one of them could be overwritten.)
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Also, this means that you cannot take the return of a kmap()
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call and DMA to/from that. This is similar to vmalloc().
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What about block I/O and networking buffers? The block I/O and
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networking subsystems make sure that the buffers they use are valid
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for you to DMA from/to.
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DMA addressing limitations
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Does your device have any DMA addressing limitations? For example, is
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your device only capable of driving the low order 24-bits of address
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on the PCI bus for SAC DMA transfers? If so, you need to inform the
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PCI layer of this fact.
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By default, the kernel assumes that your device can address the full
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32-bits in a SAC cycle. For a 64-bit DAC capable device, this needs
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to be increased. And for a device with limitations, as discussed in
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the previous paragraph, it needs to be decreased.
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pci_alloc_consistent() by default will return 32-bit DMA addresses.
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PCI-X specification requires PCI-X devices to support 64-bit
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addressing (DAC) for all transactions. And at least one platform (SGI
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SN2) requires 64-bit consistent allocations to operate correctly when
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the IO bus is in PCI-X mode. Therefore, like with pci_set_dma_mask(),
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it's good practice to call pci_set_consistent_dma_mask() to set the
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appropriate mask even if your device only supports 32-bit DMA
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(default) and especially if it's a PCI-X device.
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For correct operation, you must interrogate the PCI layer in your
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device probe routine to see if the PCI controller on the machine can
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properly support the DMA addressing limitation your device has. It is
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good style to do this even if your device holds the default setting,
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because this shows that you did think about these issues wrt. your
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device.
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The query is performed via a call to pci_set_dma_mask():
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int pci_set_dma_mask(struct pci_dev *pdev, u64 device_mask);
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The query for consistent allocations is performed via a a call to
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pci_set_consistent_dma_mask():
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int pci_set_consistent_dma_mask(struct pci_dev *pdev, u64 device_mask);
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Here, pdev is a pointer to the PCI device struct of your device, and
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device_mask is a bit mask describing which bits of a PCI address your
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device supports. It returns zero if your card can perform DMA
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properly on the machine given the address mask you provided.
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If it returns non-zero, your device can not perform DMA properly on
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this platform, and attempting to do so will result in undefined
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behavior. You must either use a different mask, or not use DMA.
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This means that in the failure case, you have three options:
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1) Use another DMA mask, if possible (see below).
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2) Use some non-DMA mode for data transfer, if possible.
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3) Ignore this device and do not initialize it.
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It is recommended that your driver print a kernel KERN_WARNING message
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when you end up performing either #2 or #3. In this manner, if a user
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of your driver reports that performance is bad or that the device is not
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even detected, you can ask them for the kernel messages to find out
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exactly why.
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The standard 32-bit addressing PCI device would do something like
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this:
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if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
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printk(KERN_WARNING
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"mydev: No suitable DMA available.\n");
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goto ignore_this_device;
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}
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Another common scenario is a 64-bit capable device. The approach
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here is to try for 64-bit DAC addressing, but back down to a
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32-bit mask should that fail. The PCI platform code may fail the
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64-bit mask not because the platform is not capable of 64-bit
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addressing. Rather, it may fail in this case simply because
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32-bit SAC addressing is done more efficiently than DAC addressing.
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Sparc64 is one platform which behaves in this way.
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Here is how you would handle a 64-bit capable device which can drive
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all 64-bits when accessing streaming DMA:
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int using_dac;
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if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
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using_dac = 1;
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} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
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using_dac = 0;
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} else {
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printk(KERN_WARNING
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"mydev: No suitable DMA available.\n");
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goto ignore_this_device;
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}
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If a card is capable of using 64-bit consistent allocations as well,
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the case would look like this:
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int using_dac, consistent_using_dac;
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if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
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using_dac = 1;
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consistent_using_dac = 1;
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pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
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} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
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using_dac = 0;
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consistent_using_dac = 0;
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pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
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} else {
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printk(KERN_WARNING
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"mydev: No suitable DMA available.\n");
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goto ignore_this_device;
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}
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pci_set_consistent_dma_mask() will always be able to set the same or a
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smaller mask as pci_set_dma_mask(). However for the rare case that a
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device driver only uses consistent allocations, one would have to
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check the return value from pci_set_consistent_dma_mask().
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If your 64-bit device is going to be an enormous consumer of DMA
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mappings, this can be problematic since the DMA mappings are a
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finite resource on many platforms. Please see the "DAC Addressing
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for Address Space Hungry Devices" section near the end of this
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document for how to handle this case.
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Finally, if your device can only drive the low 24-bits of
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address during PCI bus mastering you might do something like:
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if (pci_set_dma_mask(pdev, DMA_24BIT_MASK)) {
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printk(KERN_WARNING
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"mydev: 24-bit DMA addressing not available.\n");
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goto ignore_this_device;
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}
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[Better use DMA_24BIT_MASK instead of 0x00ffffff.
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See linux/include/dma-mapping.h for reference.]
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When pci_set_dma_mask() is successful, and returns zero, the PCI layer
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saves away this mask you have provided. The PCI layer will use this
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information later when you make DMA mappings.
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There is a case which we are aware of at this time, which is worth
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mentioning in this documentation. If your device supports multiple
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functions (for example a sound card provides playback and record
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functions) and the various different functions have _different_
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DMA addressing limitations, you may wish to probe each mask and
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only provide the functionality which the machine can handle. It
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is important that the last call to pci_set_dma_mask() be for the
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most specific mask.
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Here is pseudo-code showing how this might be done:
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#define PLAYBACK_ADDRESS_BITS DMA_32BIT_MASK
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#define RECORD_ADDRESS_BITS 0x00ffffff
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struct my_sound_card *card;
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struct pci_dev *pdev;
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...
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if (!pci_set_dma_mask(pdev, PLAYBACK_ADDRESS_BITS)) {
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card->playback_enabled = 1;
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} else {
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card->playback_enabled = 0;
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printk(KERN_WARN "%s: Playback disabled due to DMA limitations.\n",
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card->name);
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}
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if (!pci_set_dma_mask(pdev, RECORD_ADDRESS_BITS)) {
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card->record_enabled = 1;
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} else {
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card->record_enabled = 0;
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printk(KERN_WARN "%s: Record disabled due to DMA limitations.\n",
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card->name);
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}
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A sound card was used as an example here because this genre of PCI
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devices seems to be littered with ISA chips given a PCI front end,
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and thus retaining the 16MB DMA addressing limitations of ISA.
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Types of DMA mappings
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There are two types of DMA mappings:
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- Consistent DMA mappings which are usually mapped at driver
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initialization, unmapped at the end and for which the hardware should
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guarantee that the device and the CPU can access the data
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in parallel and will see updates made by each other without any
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explicit software flushing.
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Think of "consistent" as "synchronous" or "coherent".
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The current default is to return consistent memory in the low 32
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bits of the PCI bus space. However, for future compatibility you
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should set the consistent mask even if this default is fine for your
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driver.
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Good examples of what to use consistent mappings for are:
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- Network card DMA ring descriptors.
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- SCSI adapter mailbox command data structures.
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- Device firmware microcode executed out of
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main memory.
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The invariant these examples all require is that any CPU store
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to memory is immediately visible to the device, and vice
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versa. Consistent mappings guarantee this.
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IMPORTANT: Consistent DMA memory does not preclude the usage of
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proper memory barriers. The CPU may reorder stores to
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consistent memory just as it may normal memory. Example:
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if it is important for the device to see the first word
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of a descriptor updated before the second, you must do
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something like:
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desc->word0 = address;
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wmb();
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desc->word1 = DESC_VALID;
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in order to get correct behavior on all platforms.
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Also, on some platforms your driver may need to flush CPU write
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buffers in much the same way as it needs to flush write buffers
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found in PCI bridges (such as by reading a register's value
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after writing it).
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- Streaming DMA mappings which are usually mapped for one DMA transfer,
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unmapped right after it (unless you use pci_dma_sync_* below) and for which
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hardware can optimize for sequential accesses.
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This of "streaming" as "asynchronous" or "outside the coherency
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domain".
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Good examples of what to use streaming mappings for are:
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- Networking buffers transmitted/received by a device.
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- Filesystem buffers written/read by a SCSI device.
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The interfaces for using this type of mapping were designed in
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such a way that an implementation can make whatever performance
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optimizations the hardware allows. To this end, when using
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such mappings you must be explicit about what you want to happen.
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Neither type of DMA mapping has alignment restrictions that come
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from PCI, although some devices may have such restrictions.
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Also, systems with caches that aren't DMA-coherent will work better
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when the underlying buffers don't share cache lines with other data.
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Using Consistent DMA mappings.
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To allocate and map large (PAGE_SIZE or so) consistent DMA regions,
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you should do:
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dma_addr_t dma_handle;
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cpu_addr = pci_alloc_consistent(dev, size, &dma_handle);
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where dev is a struct pci_dev *. You should pass NULL for PCI like buses
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where devices don't have struct pci_dev (like ISA, EISA). This may be
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called in interrupt context.
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This argument is needed because the DMA translations may be bus
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specific (and often is private to the bus which the device is attached
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to).
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Size is the length of the region you want to allocate, in bytes.
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This routine will allocate RAM for that region, so it acts similarly to
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__get_free_pages (but takes size instead of a page order). If your
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driver needs regions sized smaller than a page, you may prefer using
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the pci_pool interface, described below.
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The consistent DMA mapping interfaces, for non-NULL dev, will by
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default return a DMA address which is SAC (Single Address Cycle)
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addressable. Even if the device indicates (via PCI dma mask) that it
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may address the upper 32-bits and thus perform DAC cycles, consistent
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allocation will only return > 32-bit PCI addresses for DMA if the
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consistent dma mask has been explicitly changed via
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pci_set_consistent_dma_mask(). This is true of the pci_pool interface
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as well.
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pci_alloc_consistent returns two values: the virtual address which you
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can use to access it from the CPU and dma_handle which you pass to the
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card.
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The cpu return address and the DMA bus master address are both
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guaranteed to be aligned to the smallest PAGE_SIZE order which
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is greater than or equal to the requested size. This invariant
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exists (for example) to guarantee that if you allocate a chunk
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which is smaller than or equal to 64 kilobytes, the extent of the
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buffer you receive will not cross a 64K boundary.
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To unmap and free such a DMA region, you call:
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pci_free_consistent(dev, size, cpu_addr, dma_handle);
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where dev, size are the same as in the above call and cpu_addr and
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dma_handle are the values pci_alloc_consistent returned to you.
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This function may not be called in interrupt context.
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If your driver needs lots of smaller memory regions, you can write
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custom code to subdivide pages returned by pci_alloc_consistent,
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or you can use the pci_pool API to do that. A pci_pool is like
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a kmem_cache, but it uses pci_alloc_consistent not __get_free_pages.
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Also, it understands common hardware constraints for alignment,
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like queue heads needing to be aligned on N byte boundaries.
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Create a pci_pool like this:
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struct pci_pool *pool;
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pool = pci_pool_create(name, dev, size, align, alloc);
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The "name" is for diagnostics (like a kmem_cache name); dev and size
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are as above. The device's hardware alignment requirement for this
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type of data is "align" (which is expressed in bytes, and must be a
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power of two). If your device has no boundary crossing restrictions,
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pass 0 for alloc; passing 4096 says memory allocated from this pool
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must not cross 4KByte boundaries (but at that time it may be better to
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go for pci_alloc_consistent directly instead).
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Allocate memory from a pci pool like this:
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cpu_addr = pci_pool_alloc(pool, flags, &dma_handle);
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flags are SLAB_KERNEL if blocking is permitted (not in_interrupt nor
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holding SMP locks), SLAB_ATOMIC otherwise. Like pci_alloc_consistent,
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this returns two values, cpu_addr and dma_handle.
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Free memory that was allocated from a pci_pool like this:
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pci_pool_free(pool, cpu_addr, dma_handle);
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where pool is what you passed to pci_pool_alloc, and cpu_addr and
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dma_handle are the values pci_pool_alloc returned. This function
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may be called in interrupt context.
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Destroy a pci_pool by calling:
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pci_pool_destroy(pool);
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Make sure you've called pci_pool_free for all memory allocated
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from a pool before you destroy the pool. This function may not
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be called in interrupt context.
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DMA Direction
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The interfaces described in subsequent portions of this document
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take a DMA direction argument, which is an integer and takes on
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one of the following values:
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PCI_DMA_BIDIRECTIONAL
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PCI_DMA_TODEVICE
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PCI_DMA_FROMDEVICE
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PCI_DMA_NONE
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One should provide the exact DMA direction if you know it.
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PCI_DMA_TODEVICE means "from main memory to the PCI device"
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PCI_DMA_FROMDEVICE means "from the PCI device to main memory"
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It is the direction in which the data moves during the DMA
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transfer.
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You are _strongly_ encouraged to specify this as precisely
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as you possibly can.
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If you absolutely cannot know the direction of the DMA transfer,
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specify PCI_DMA_BIDIRECTIONAL. It means that the DMA can go in
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either direction. The platform guarantees that you may legally
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specify this, and that it will work, but this may be at the
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cost of performance for example.
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The value PCI_DMA_NONE is to be used for debugging. One can
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hold this in a data structure before you come to know the
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precise direction, and this will help catch cases where your
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direction tracking logic has failed to set things up properly.
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Another advantage of specifying this value precisely (outside of
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potential platform-specific optimizations of such) is for debugging.
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Some platforms actually have a write permission boolean which DMA
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mappings can be marked with, much like page protections in the user
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program address space. Such platforms can and do report errors in the
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kernel logs when the PCI controller hardware detects violation of the
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permission setting.
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Only streaming mappings specify a direction, consistent mappings
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implicitly have a direction attribute setting of
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PCI_DMA_BIDIRECTIONAL.
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The SCSI subsystem tells you the direction to use in the
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'sc_data_direction' member of the SCSI command your driver is
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working on.
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For Networking drivers, it's a rather simple affair. For transmit
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packets, map/unmap them with the PCI_DMA_TODEVICE direction
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specifier. For receive packets, just the opposite, map/unmap them
|
|
with the PCI_DMA_FROMDEVICE direction specifier.
|
|
|
|
Using Streaming DMA mappings
|
|
|
|
The streaming DMA mapping routines can be called from interrupt
|
|
context. There are two versions of each map/unmap, one which will
|
|
map/unmap a single memory region, and one which will map/unmap a
|
|
scatterlist.
|
|
|
|
To map a single region, you do:
|
|
|
|
struct pci_dev *pdev = mydev->pdev;
|
|
dma_addr_t dma_handle;
|
|
void *addr = buffer->ptr;
|
|
size_t size = buffer->len;
|
|
|
|
dma_handle = pci_map_single(dev, addr, size, direction);
|
|
|
|
and to unmap it:
|
|
|
|
pci_unmap_single(dev, dma_handle, size, direction);
|
|
|
|
You should call pci_unmap_single when the DMA activity is finished, e.g.
|
|
from the interrupt which told you that the DMA transfer is done.
|
|
|
|
Using cpu pointers like this for single mappings has a disadvantage,
|
|
you cannot reference HIGHMEM memory in this way. Thus, there is a
|
|
map/unmap interface pair akin to pci_{map,unmap}_single. These
|
|
interfaces deal with page/offset pairs instead of cpu pointers.
|
|
Specifically:
|
|
|
|
struct pci_dev *pdev = mydev->pdev;
|
|
dma_addr_t dma_handle;
|
|
struct page *page = buffer->page;
|
|
unsigned long offset = buffer->offset;
|
|
size_t size = buffer->len;
|
|
|
|
dma_handle = pci_map_page(dev, page, offset, size, direction);
|
|
|
|
...
|
|
|
|
pci_unmap_page(dev, dma_handle, size, direction);
|
|
|
|
Here, "offset" means byte offset within the given page.
|
|
|
|
With scatterlists, you map a region gathered from several regions by:
|
|
|
|
int i, count = pci_map_sg(dev, sglist, nents, direction);
|
|
struct scatterlist *sg;
|
|
|
|
for (i = 0, sg = sglist; i < count; i++, sg++) {
|
|
hw_address[i] = sg_dma_address(sg);
|
|
hw_len[i] = sg_dma_len(sg);
|
|
}
|
|
|
|
where nents is the number of entries in the sglist.
|
|
|
|
The implementation is free to merge several consecutive sglist entries
|
|
into one (e.g. if DMA mapping is done with PAGE_SIZE granularity, any
|
|
consecutive sglist entries can be merged into one provided the first one
|
|
ends and the second one starts on a page boundary - in fact this is a huge
|
|
advantage for cards which either cannot do scatter-gather or have very
|
|
limited number of scatter-gather entries) and returns the actual number
|
|
of sg entries it mapped them to. On failure 0 is returned.
|
|
|
|
Then you should loop count times (note: this can be less than nents times)
|
|
and use sg_dma_address() and sg_dma_len() macros where you previously
|
|
accessed sg->address and sg->length as shown above.
|
|
|
|
To unmap a scatterlist, just call:
|
|
|
|
pci_unmap_sg(dev, sglist, nents, direction);
|
|
|
|
Again, make sure DMA activity has already finished.
|
|
|
|
PLEASE NOTE: The 'nents' argument to the pci_unmap_sg call must be
|
|
the _same_ one you passed into the pci_map_sg call,
|
|
it should _NOT_ be the 'count' value _returned_ from the
|
|
pci_map_sg call.
|
|
|
|
Every pci_map_{single,sg} call should have its pci_unmap_{single,sg}
|
|
counterpart, because the bus address space is a shared resource (although
|
|
in some ports the mapping is per each BUS so less devices contend for the
|
|
same bus address space) and you could render the machine unusable by eating
|
|
all bus addresses.
|
|
|
|
If you need to use the same streaming DMA region multiple times and touch
|
|
the data in between the DMA transfers, the buffer needs to be synced
|
|
properly in order for the cpu and device to see the most uptodate and
|
|
correct copy of the DMA buffer.
|
|
|
|
So, firstly, just map it with pci_map_{single,sg}, and after each DMA
|
|
transfer call either:
|
|
|
|
pci_dma_sync_single_for_cpu(dev, dma_handle, size, direction);
|
|
|
|
or:
|
|
|
|
pci_dma_sync_sg_for_cpu(dev, sglist, nents, direction);
|
|
|
|
as appropriate.
|
|
|
|
Then, if you wish to let the device get at the DMA area again,
|
|
finish accessing the data with the cpu, and then before actually
|
|
giving the buffer to the hardware call either:
|
|
|
|
pci_dma_sync_single_for_device(dev, dma_handle, size, direction);
|
|
|
|
or:
|
|
|
|
pci_dma_sync_sg_for_device(dev, sglist, nents, direction);
|
|
|
|
as appropriate.
|
|
|
|
After the last DMA transfer call one of the DMA unmap routines
|
|
pci_unmap_{single,sg}. If you don't touch the data from the first pci_map_*
|
|
call till pci_unmap_*, then you don't have to call the pci_dma_sync_*
|
|
routines at all.
|
|
|
|
Here is pseudo code which shows a situation in which you would need
|
|
to use the pci_dma_sync_*() interfaces.
|
|
|
|
my_card_setup_receive_buffer(struct my_card *cp, char *buffer, int len)
|
|
{
|
|
dma_addr_t mapping;
|
|
|
|
mapping = pci_map_single(cp->pdev, buffer, len, PCI_DMA_FROMDEVICE);
|
|
|
|
cp->rx_buf = buffer;
|
|
cp->rx_len = len;
|
|
cp->rx_dma = mapping;
|
|
|
|
give_rx_buf_to_card(cp);
|
|
}
|
|
|
|
...
|
|
|
|
my_card_interrupt_handler(int irq, void *devid, struct pt_regs *regs)
|
|
{
|
|
struct my_card *cp = devid;
|
|
|
|
...
|
|
if (read_card_status(cp) == RX_BUF_TRANSFERRED) {
|
|
struct my_card_header *hp;
|
|
|
|
/* Examine the header to see if we wish
|
|
* to accept the data. But synchronize
|
|
* the DMA transfer with the CPU first
|
|
* so that we see updated contents.
|
|
*/
|
|
pci_dma_sync_single_for_cpu(cp->pdev, cp->rx_dma,
|
|
cp->rx_len,
|
|
PCI_DMA_FROMDEVICE);
|
|
|
|
/* Now it is safe to examine the buffer. */
|
|
hp = (struct my_card_header *) cp->rx_buf;
|
|
if (header_is_ok(hp)) {
|
|
pci_unmap_single(cp->pdev, cp->rx_dma, cp->rx_len,
|
|
PCI_DMA_FROMDEVICE);
|
|
pass_to_upper_layers(cp->rx_buf);
|
|
make_and_setup_new_rx_buf(cp);
|
|
} else {
|
|
/* Just sync the buffer and give it back
|
|
* to the card.
|
|
*/
|
|
pci_dma_sync_single_for_device(cp->pdev,
|
|
cp->rx_dma,
|
|
cp->rx_len,
|
|
PCI_DMA_FROMDEVICE);
|
|
give_rx_buf_to_card(cp);
|
|
}
|
|
}
|
|
}
|
|
|
|
Drivers converted fully to this interface should not use virt_to_bus any
|
|
longer, nor should they use bus_to_virt. Some drivers have to be changed a
|
|
little bit, because there is no longer an equivalent to bus_to_virt in the
|
|
dynamic DMA mapping scheme - you have to always store the DMA addresses
|
|
returned by the pci_alloc_consistent, pci_pool_alloc, and pci_map_single
|
|
calls (pci_map_sg stores them in the scatterlist itself if the platform
|
|
supports dynamic DMA mapping in hardware) in your driver structures and/or
|
|
in the card registers.
|
|
|
|
All PCI drivers should be using these interfaces with no exceptions.
|
|
It is planned to completely remove virt_to_bus() and bus_to_virt() as
|
|
they are entirely deprecated. Some ports already do not provide these
|
|
as it is impossible to correctly support them.
|
|
|
|
64-bit DMA and DAC cycle support
|
|
|
|
Do you understand all of the text above? Great, then you already
|
|
know how to use 64-bit DMA addressing under Linux. Simply make
|
|
the appropriate pci_set_dma_mask() calls based upon your cards
|
|
capabilities, then use the mapping APIs above.
|
|
|
|
It is that simple.
|
|
|
|
Well, not for some odd devices. See the next section for information
|
|
about that.
|
|
|
|
DAC Addressing for Address Space Hungry Devices
|
|
|
|
There exists a class of devices which do not mesh well with the PCI
|
|
DMA mapping API. By definition these "mappings" are a finite
|
|
resource. The number of total available mappings per bus is platform
|
|
specific, but there will always be a reasonable amount.
|
|
|
|
What is "reasonable"? Reasonable means that networking and block I/O
|
|
devices need not worry about using too many mappings.
|
|
|
|
As an example of a problematic device, consider compute cluster cards.
|
|
They can potentially need to access gigabytes of memory at once via
|
|
DMA. Dynamic mappings are unsuitable for this kind of access pattern.
|
|
|
|
To this end we've provided a small API by which a device driver
|
|
may use DAC cycles to directly address all of physical memory.
|
|
Not all platforms support this, but most do. It is easy to determine
|
|
whether the platform will work properly at probe time.
|
|
|
|
First, understand that there may be a SEVERE performance penalty for
|
|
using these interfaces on some platforms. Therefore, you MUST only
|
|
use these interfaces if it is absolutely required. %99 of devices can
|
|
use the normal APIs without any problems.
|
|
|
|
Note that for streaming type mappings you must either use these
|
|
interfaces, or the dynamic mapping interfaces above. You may not mix
|
|
usage of both for the same device. Such an act is illegal and is
|
|
guaranteed to put a banana in your tailpipe.
|
|
|
|
However, consistent mappings may in fact be used in conjunction with
|
|
these interfaces. Remember that, as defined, consistent mappings are
|
|
always going to be SAC addressable.
|
|
|
|
The first thing your driver needs to do is query the PCI platform
|
|
layer with your devices DAC addressing capabilities:
|
|
|
|
int pci_dac_set_dma_mask(struct pci_dev *pdev, u64 mask);
|
|
|
|
This routine behaves identically to pci_set_dma_mask. You may not
|
|
use the following interfaces if this routine fails.
|
|
|
|
Next, DMA addresses using this API are kept track of using the
|
|
dma64_addr_t type. It is guaranteed to be big enough to hold any
|
|
DAC address the platform layer will give to you from the following
|
|
routines. If you have consistent mappings as well, you still
|
|
use plain dma_addr_t to keep track of those.
|
|
|
|
All mappings obtained here will be direct. The mappings are not
|
|
translated, and this is the purpose of this dialect of the DMA API.
|
|
|
|
All routines work with page/offset pairs. This is the _ONLY_ way to
|
|
portably refer to any piece of memory. If you have a cpu pointer
|
|
(which may be validly DMA'd too) you may easily obtain the page
|
|
and offset using something like this:
|
|
|
|
struct page *page = virt_to_page(ptr);
|
|
unsigned long offset = offset_in_page(ptr);
|
|
|
|
Here are the interfaces:
|
|
|
|
dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev,
|
|
struct page *page,
|
|
unsigned long offset,
|
|
int direction);
|
|
|
|
The DAC address for the tuple PAGE/OFFSET are returned. The direction
|
|
argument is the same as for pci_{map,unmap}_single(). The same rules
|
|
for cpu/device access apply here as for the streaming mapping
|
|
interfaces. To reiterate:
|
|
|
|
The cpu may touch the buffer before pci_dac_page_to_dma.
|
|
The device may touch the buffer after pci_dac_page_to_dma
|
|
is made, but the cpu may NOT.
|
|
|
|
When the DMA transfer is complete, invoke:
|
|
|
|
void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev,
|
|
dma64_addr_t dma_addr,
|
|
size_t len, int direction);
|
|
|
|
This must be done before the CPU looks at the buffer again.
|
|
This interface behaves identically to pci_dma_sync_{single,sg}_for_cpu().
|
|
|
|
And likewise, if you wish to let the device get back at the buffer after
|
|
the cpu has read/written it, invoke:
|
|
|
|
void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev,
|
|
dma64_addr_t dma_addr,
|
|
size_t len, int direction);
|
|
|
|
before letting the device access the DMA area again.
|
|
|
|
If you need to get back to the PAGE/OFFSET tuple from a dma64_addr_t
|
|
the following interfaces are provided:
|
|
|
|
struct page *pci_dac_dma_to_page(struct pci_dev *pdev,
|
|
dma64_addr_t dma_addr);
|
|
unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev,
|
|
dma64_addr_t dma_addr);
|
|
|
|
This is possible with the DAC interfaces purely because they are
|
|
not translated in any way.
|
|
|
|
Optimizing Unmap State Space Consumption
|
|
|
|
On many platforms, pci_unmap_{single,page}() is simply a nop.
|
|
Therefore, keeping track of the mapping address and length is a waste
|
|
of space. Instead of filling your drivers up with ifdefs and the like
|
|
to "work around" this (which would defeat the whole purpose of a
|
|
portable API) the following facilities are provided.
|
|
|
|
Actually, instead of describing the macros one by one, we'll
|
|
transform some example code.
|
|
|
|
1) Use DECLARE_PCI_UNMAP_{ADDR,LEN} in state saving structures.
|
|
Example, before:
|
|
|
|
struct ring_state {
|
|
struct sk_buff *skb;
|
|
dma_addr_t mapping;
|
|
__u32 len;
|
|
};
|
|
|
|
after:
|
|
|
|
struct ring_state {
|
|
struct sk_buff *skb;
|
|
DECLARE_PCI_UNMAP_ADDR(mapping)
|
|
DECLARE_PCI_UNMAP_LEN(len)
|
|
};
|
|
|
|
NOTE: DO NOT put a semicolon at the end of the DECLARE_*()
|
|
macro.
|
|
|
|
2) Use pci_unmap_{addr,len}_set to set these values.
|
|
Example, before:
|
|
|
|
ringp->mapping = FOO;
|
|
ringp->len = BAR;
|
|
|
|
after:
|
|
|
|
pci_unmap_addr_set(ringp, mapping, FOO);
|
|
pci_unmap_len_set(ringp, len, BAR);
|
|
|
|
3) Use pci_unmap_{addr,len} to access these values.
|
|
Example, before:
|
|
|
|
pci_unmap_single(pdev, ringp->mapping, ringp->len,
|
|
PCI_DMA_FROMDEVICE);
|
|
|
|
after:
|
|
|
|
pci_unmap_single(pdev,
|
|
pci_unmap_addr(ringp, mapping),
|
|
pci_unmap_len(ringp, len),
|
|
PCI_DMA_FROMDEVICE);
|
|
|
|
It really should be self-explanatory. We treat the ADDR and LEN
|
|
separately, because it is possible for an implementation to only
|
|
need the address in order to perform the unmap operation.
|
|
|
|
Platform Issues
|
|
|
|
If you are just writing drivers for Linux and do not maintain
|
|
an architecture port for the kernel, you can safely skip down
|
|
to "Closing".
|
|
|
|
1) Struct scatterlist requirements.
|
|
|
|
Struct scatterlist must contain, at a minimum, the following
|
|
members:
|
|
|
|
struct page *page;
|
|
unsigned int offset;
|
|
unsigned int length;
|
|
|
|
The base address is specified by a "page+offset" pair.
|
|
|
|
Previous versions of struct scatterlist contained a "void *address"
|
|
field that was sometimes used instead of page+offset. As of Linux
|
|
2.5., page+offset is always used, and the "address" field has been
|
|
deleted.
|
|
|
|
2) More to come...
|
|
|
|
Handling Errors
|
|
|
|
DMA address space is limited on some architectures and an allocation
|
|
failure can be determined by:
|
|
|
|
- checking if pci_alloc_consistent returns NULL or pci_map_sg returns 0
|
|
|
|
- checking the returned dma_addr_t of pci_map_single and pci_map_page
|
|
by using pci_dma_mapping_error():
|
|
|
|
dma_addr_t dma_handle;
|
|
|
|
dma_handle = pci_map_single(dev, addr, size, direction);
|
|
if (pci_dma_mapping_error(dma_handle)) {
|
|
/*
|
|
* reduce current DMA mapping usage,
|
|
* delay and try again later or
|
|
* reset driver.
|
|
*/
|
|
}
|
|
|
|
Closing
|
|
|
|
This document, and the API itself, would not be in it's current
|
|
form without the feedback and suggestions from numerous individuals.
|
|
We would like to specifically mention, in no particular order, the
|
|
following people:
|
|
|
|
Russell King <rmk@arm.linux.org.uk>
|
|
Leo Dagum <dagum@barrel.engr.sgi.com>
|
|
Ralf Baechle <ralf@oss.sgi.com>
|
|
Grant Grundler <grundler@cup.hp.com>
|
|
Jay Estabrook <Jay.Estabrook@compaq.com>
|
|
Thomas Sailer <sailer@ife.ee.ethz.ch>
|
|
Andrea Arcangeli <andrea@suse.de>
|
|
Jens Axboe <axboe@suse.de>
|
|
David Mosberger-Tang <davidm@hpl.hp.com>
|