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7cbb355e94
Some people were seeing *ERROR* radeon: writting more dword to ring than expected after certain blits, the loops calculation didn't take into account that we do a separate blit for the remainder after doing the aligned blits. Acked-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>