mirror of
https://github.com/FEX-Emu/linux.git
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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
94 lines
2.0 KiB
C
94 lines
2.0 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/marvell.h>
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static int mv_read_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 * val)
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{
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struct mv_pci_controller *mvbc = bus->sysdata;
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unsigned long address_reg, data_reg;
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u32 address;
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address_reg = mvbc->config_addr;
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data_reg = mvbc->config_vreg;
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/* Accessing device 31 crashes those Marvells. Since years.
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Will they ever make sane controllers ... */
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if (PCI_SLOT(devfn) == 31)
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return PCIBIOS_DEVICE_NOT_FOUND;
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address = (bus->number << 16) | (devfn << 8) |
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(where & 0xfc) | 0x80000000;
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/* start the configuration cycle */
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MV_WRITE(address_reg, address);
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switch (size) {
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case 1:
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*val = MV_READ_8(data_reg + (where & 0x3));
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break;
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case 2:
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*val = MV_READ_16(data_reg + (where & 0x3));
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break;
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case 4:
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*val = MV_READ(data_reg);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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static int mv_write_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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struct mv_pci_controller *mvbc = bus->sysdata;
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unsigned long address_reg, data_reg;
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u32 address;
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address_reg = mvbc->config_addr;
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data_reg = mvbc->config_vreg;
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/* Accessing device 31 crashes those Marvells. Since years.
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Will they ever make sane controllers ... */
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if (PCI_SLOT(devfn) == 31)
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return PCIBIOS_DEVICE_NOT_FOUND;
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address = (bus->number << 16) | (devfn << 8) |
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(where & 0xfc) | 0x80000000;
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/* start the configuration cycle */
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MV_WRITE(address_reg, address);
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switch (size) {
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case 1:
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MV_WRITE_8(data_reg + (where & 0x3), val);
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break;
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case 2:
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MV_WRITE_16(data_reg + (where & 0x3), val);
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break;
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case 4:
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MV_WRITE(data_reg, val);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops mv_pci_ops = {
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.read = mv_read_config,
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.write = mv_write_config
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};
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