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History

Zhang Wei f79abb627f fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.

The DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register)
is 0. When the transfer started with a byte count of zero, the DMA
controller will triger a PE(programming error) event and halt, not a normal
interrupt. I add special codes for PE event and DMA_INTERRUPT
async_tx testing.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

2008-03-18 17:00:59 -07:00

dmaengine.c

dmaengine: Fix a bug about BUG_ON() on DMA engine capability DMA_INTERRUPT.

2008-03-13 10:57:07 -07:00

fsldma.c

fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.

2008-03-18 17:00:59 -07:00

fsldma.h

fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.

2008-03-18 17:00:59 -07:00

ioat_dca.c

I/OAT: Add support for version 2 of ioatdma device