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d84248bf46
We have a wifi module connected to the spi bus and got sometimes FIFO overrun errors on the spi bus. After some investigation i found that the driver loads the TCR (transmit count) register before the RCR (receive count). When the transfer list is not empty the atmel_spi_next_message is called while tx and rx are enabled. As soon as the TCR is loaded, hardware starts transfer and causes a rx fifo overrun because the RCR is not loaded yet. Load the RCR before the TCR. After this patch the fifo overrun disapears at out setup. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Rini van Zetten <rini@arvoo.nl> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>