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3c9aea4742
The clock events merge introduced a change to the nmi watchdog code to handle the not longer increasing local apic timer count in the broadcast mode. This is fine for UP, but on SMP it pampers over a stuck CPU which is not handling the broadcast interrupt due to the unconditional sum up of local apic timer count and irq0 count. To cover all cases we need to keep track on which CPU irq0 is handled. In theory this is CPU#0 due to the explicit disabling of irq balancing for irq0, but there are systems which ignore this on the hardware level. The per cpu irq0 accounting allows us to remove the irq0 to CPU0 binding as well. Add a per cpu counter for irq0 and evaluate this instead of the global irq0 count in the nmi watchdog code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@linux.intel.com>
240 lines
6.3 KiB
C
240 lines
6.3 KiB
C
/*
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* linux/arch/i386/kernel/time.c
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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*
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* This file contains the PC-specific time handling details:
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* reading the RTC at bootup, etc..
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* 1994-07-02 Alan Modra
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* fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
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* 1995-03-26 Markus Kuhn
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* fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887
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* precision CMOS clock update
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* 1996-05-03 Ingo Molnar
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* fixed time warps in do_[slow|fast]_gettimeoffset()
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* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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* 1998-09-05 (Various)
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* More robust do_fast_gettimeoffset() algorithm implemented
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* (works with APM, Cyrix 6x86MX and Centaur C6),
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* monotonic gettimeofday() with fast_get_timeoffset(),
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* drift-proof precision TSC calibration on boot
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* (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D.
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* Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>;
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* ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>).
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* 1998-12-16 Andrea Arcangeli
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* Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy
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* because was not accounting lost_ticks.
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* 1998-12-24 Copyright (C) 1998 Andrea Arcangeli
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* Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
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* serialize accesses to xtime/lost_ticks).
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/bcd.h>
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#include <linux/efi.h>
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#include <linux/mca.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/irq.h>
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#include <asm/msr.h>
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#include <asm/delay.h>
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#include <asm/mpspec.h>
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#include <asm/uaccess.h>
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#include <asm/processor.h>
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#include <asm/timer.h>
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#include <asm/time.h>
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#include "mach_time.h"
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#include <linux/timex.h>
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#include <asm/hpet.h>
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#include <asm/arch_hooks.h>
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#include "io_ports.h"
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#include <asm/i8259.h>
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#include "do_timer.h"
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unsigned int cpu_khz; /* Detected as we calibrate the TSC */
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EXPORT_SYMBOL(cpu_khz);
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DEFINE_SPINLOCK(rtc_lock);
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EXPORT_SYMBOL(rtc_lock);
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/*
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* This is a special lock that is owned by the CPU and holds the index
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* register we are working with. It is required for NMI access to the
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* CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
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*/
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volatile unsigned long cmos_lock = 0;
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EXPORT_SYMBOL(cmos_lock);
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/* Routines for accessing the CMOS RAM/RTC. */
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unsigned char rtc_cmos_read(unsigned char addr)
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{
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unsigned char val;
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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val = inb_p(RTC_PORT(1));
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lock_cmos_suffix(addr);
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return val;
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}
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EXPORT_SYMBOL(rtc_cmos_read);
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void rtc_cmos_write(unsigned char val, unsigned char addr)
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{
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lock_cmos_prefix(addr);
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outb_p(addr, RTC_PORT(0));
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outb_p(val, RTC_PORT(1));
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lock_cmos_suffix(addr);
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}
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EXPORT_SYMBOL(rtc_cmos_write);
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static int set_rtc_mmss(unsigned long nowtime)
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{
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int retval;
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unsigned long flags;
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/* gets recalled with irq locally disabled */
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/* XXX - does irqsave resolve this? -johnstul */
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spin_lock_irqsave(&rtc_lock, flags);
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retval = set_wallclock(nowtime);
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spin_unlock_irqrestore(&rtc_lock, flags);
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return retval;
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}
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int timer_ack;
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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#ifdef CONFIG_SMP
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if (!v8086_mode(regs) && SEGMENT_IS_KERNEL_CODE(regs->xcs) &&
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in_lock_functions(pc)) {
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#ifdef CONFIG_FRAME_POINTER
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return *(unsigned long *)(regs->ebp + 4);
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#else
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unsigned long *sp = (unsigned long *)®s->esp;
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/* Return address is either directly at stack pointer
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or above a saved eflags. Eflags has bits 22-31 zero,
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kernel addresses don't. */
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if (sp[0] >> 22)
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return sp[0];
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if (sp[1] >> 22)
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return sp[1];
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#endif
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}
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#endif
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* This is the same as the above, except we _also_ save the current
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* Time Stamp Counter value at the time of the timer interrupt, so that
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* we later on can estimate the time of day more exactly.
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*/
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irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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/* Keep nmi watchdog up to date */
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per_cpu(irq_stat, smp_processor_id()).irq0_irqs++;
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#ifdef CONFIG_X86_IO_APIC
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if (timer_ack) {
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/*
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* Subtle, when I/O APICs are used we have to ack timer IRQ
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* manually to reset the IRR bit for do_slow_gettimeoffset().
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* This will also deassert NMI lines for the watchdog if run
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* on an 82489DX-based system.
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*/
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spin_lock(&i8259A_lock);
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outb(0x0c, PIC_MASTER_OCW3);
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/* Ack the IRQ; AEOI will end it automatically. */
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inb(PIC_MASTER_POLL);
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spin_unlock(&i8259A_lock);
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}
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#endif
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do_timer_interrupt_hook();
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if (MCA_bus) {
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/* The PS/2 uses level-triggered interrupts. You can't
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turn them off, nor would you want to (any attempt to
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enable edge-triggered interrupts usually gets intercepted by a
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special hardware circuit). Hence we have to acknowledge
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the timer interrupt. Through some incredibly stupid
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design idea, the reset for IRQ 0 is done by setting the
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high bit of the PPI port B (0x61). Note that some PS/2s,
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notably the 55SX, work fine if this is removed. */
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u8 irq_v = inb_p( 0x61 ); /* read the current state */
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outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */
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}
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return IRQ_HANDLED;
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}
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/* not static: needed by APM */
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unsigned long read_persistent_clock(void)
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{
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unsigned long retval;
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unsigned long flags;
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spin_lock_irqsave(&rtc_lock, flags);
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retval = get_wallclock();
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spin_unlock_irqrestore(&rtc_lock, flags);
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return retval;
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}
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int update_persistent_clock(struct timespec now)
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{
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return set_rtc_mmss(now.tv_sec);
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}
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extern void (*late_time_init)(void);
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/* Duplicate of time_init() below, with hpet_enable part added */
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void __init hpet_time_init(void)
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{
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if (!hpet_enable())
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setup_pit_timer();
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time_init_hook();
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}
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/*
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* This is called directly from init code; we must delay timer setup in the
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* HPET case as we can't make the decision to turn on HPET this early in the
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* boot process.
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*
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* The chosen time_init function will usually be hpet_time_init, above, but
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* in the case of virtual hardware, an alternative function may be substituted.
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*/
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void __init time_init(void)
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{
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tsc_init();
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late_time_init = choose_time_init();
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}
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