Dinh Nguyen 56713da3ee clk: socfpga: allow for multiple parents on Arria10 periph clocks ...

There are some Arria10 clocks of type "altr,socfpga-a10-perip-clk" that can
have multiple parents. Fix up the __socfpga_periph_init() to call
of_clk_parent_fill() that will return the appropriate number of parents.

Also, update __socfpga_gate_init() to call of_clk_parent_fill() helper
function.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

2016-02-22 14:17:37 -08:00

..

clk-gate-a10.c

clk: socfpga: allow for multiple parents on Arria10 periph clocks

2016-02-22 14:17:37 -08:00

clk-gate.c

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clk-periph-a10.c

clk: socfpga: allow for multiple parents on Arria10 periph clocks

2016-02-22 14:17:37 -08:00

clk-periph.c

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clk-pll-a10.c

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clk-pll.c

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clk.c

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clk.h

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Makefile

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