Linus Torvalds baeedc7158 Merge branch 'prep-for-5level' ... Merge 5-level page table prep from Kirill Shutemov: "Here's relatively low-risk part of 5-level paging patchset. Merging it now will make x86 5-level paging enabling in v4.12 easier. The first patch is actually x86-specific: detect 5-level paging support. It boils down to single define. The rest of patchset converts Linux MMU abstraction from 4- to 5-level paging. Enabling of new abstraction in most cases requires adding single line of code in arch-specific code. The rest is taken care by asm-generic/. Changes to mm/ code are mostly mechanical: add support for new page table level -- p4d_t -- where we deal with pud_t now. v2: - fix build on microblaze (Michal); - comment for __ARCH_HAS_5LEVEL_HACK in kasan_populate_zero_shadow(); - acks from Michal" * emailed patches from Kirill A Shutemov <kirill.shutemov@linux.intel.com>: mm: introduce __p4d_alloc() mm: convert generic code to 5-level paging asm-generic: introduce <asm-generic/pgtable-nop4d.h> arch, mm: convert all architectures to use 5level-fixup.h asm-generic: introduce __ARCH_USE_5LEVEL_HACK asm-generic: introduce 5level-fixup.h x86/cpufeature: Add 5-level paging detection		2017-03-10 08:59:07 -08:00
..
kasan_init.c	mm: convert generic code to 5-level paging	2017-03-09 11:48:47 -08:00
kasan.c	sched/headers: Prepare for new header dependencies before moving code to <linux/sched/task_stack.h>	2017-03-02 08:42:36 +01:00
kasan.h	kasan: support use-after-scope detection	2016-11-30 16:32:52 -08:00
Makefile
quarantine.c	kasan: fix races in quarantine_remove_cache()	2017-03-09 17:01:10 -08:00
report.c	kasan: respect /proc/sys/kernel/traceoff_on_warning	2017-02-03 14:13:19 -08:00