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fa0fe48fcc
Other machines may wish to make use of the VIC support code, so move it to arch/arm/common. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
39 lines
948 B
ArmAsm
39 lines
948 B
ArmAsm
/*
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* include/asm-arm/arch-versatile/entry-macro.S
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*
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* Low-level IRQ helper macros for Versatile platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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#include <asm/hardware/vic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE)
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ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status
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mov \irqnr, #0
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teq \irqstat, #0
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beq 1003f
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1001: tst \irqstat, #15
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bne 1002f
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add \irqnr, \irqnr, #4
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movs \irqstat, \irqstat, lsr #4
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bne 1001b
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1002: tst \irqstat, #1
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bne 1003f
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add \irqnr, \irqnr, #1
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movs \irqstat, \irqstat, lsr #1
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bne 1002b
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1003: /* EQ will be set if no irqs pending */
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@ clz \irqnr, \irqstat
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@1003: /* EQ will be set if we reach MAXIRQNUM */
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.endm
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