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88da44c5ed
iqc1, iqc2, tegra_clk_pll_a_out_adsp, tegra_clk_pll_a_out0_out_adsp, adsp and adsp neon were not modelled. dp2 wasn't modelled for Tegra210. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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.. | ||
arm | ||
clk | ||
clock | ||
display | ||
dma | ||
gpio | ||
i2c | ||
iio | ||
input | ||
interrupt-controller | ||
leds | ||
mailbox | ||
media | ||
memory | ||
mfd | ||
net | ||
phy | ||
pinctrl | ||
power | ||
pwm | ||
regulator | ||
reset | ||
soc | ||
sound | ||
spmi | ||
thermal |