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2243a87d90
What the patch does: 1. Call pinmux_disable_setting ahead of pinmux_enable_setting each time pinctrl_select_state is called 2. Remove the HW disable operation in pinmux_disable_setting function. 3. Remove the disable ops in struct pinmux_ops 4. Remove all the disable ops users in current code base. Notes: 1. Great thanks for the suggestion from Linus, Tony Lindgren and Stephen Warren and Everyone that shared comments on this patch. 2. The patch also includes comment fixes from Stephen Warren. The reason why we do this: 1. To avoid duplicated calling of the enable_setting operation without disabling operation inbetween which will let the pin descriptor desc->mux_usecount increase monotonously. 2. The HW pin disable operation is not useful for any of the existing platforms. And this can be used to avoid the HW glitch after using the item #1 modification. In the following case, the issue can be reproduced: 1. There is a driver that need to switch pin state dynamically, e.g. between "sleep" and "default" state 2. The pin setting configuration in a DTS node may be like this: component a { pinctrl-names = "default", "sleep"; pinctrl-0 = <&a_grp_setting &c_grp_setting>; pinctrl-1 = <&b_grp_setting &c_grp_setting>; } The "c_grp_setting" config node is totally identical, maybe like following one: c_grp_setting: c_grp_setting { pinctrl-single,pins = <GPIO48 AF6>; } 3. When switching the pin state in the following official pinctrl sequence: pin = pinctrl_get(); state = pinctrl_lookup_state(wanted_state); pinctrl_select_state(state); pinctrl_put(); Test Result: 1. The switch is completed as expected, that is: the device's pin configuration is changed according to the description in the "wanted_state" group setting 2. The "desc->mux_usecount" of the corresponding pins in "c_group" is increased without being decreased, because the "desc" is for each physical pin while the setting is for each setting node in the DTS. Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead of enabling "c_grp_setting" in pinctrl-1, the desc->mux_usecount will keep increasing without any chance to be decreased. According to the comments in the original code, only the setting, in old state but not in new state, will be "disabled" (calling pinmux_disable_setting), which is correct logic but not intact. We still need consider case that the setting is in both old state and new state. We can do this in the following two ways: 1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin setting" repeatedly 2. "Disable"(calling pinmux_disable_setting) the "same pin setting", actually two setting instances, ahead of enabling them. Analysis: 1. The solution #2 is better because it can avoid too much iteration. 2. If we disable all of the settings in the old state and one of the setting(s) exist in the new state, the pins mux function change may happen when some SoC vendors defined the "pinctrl-single,function-off" in their DTS file. old_setting => disabled_setting => new_setting. 3. In the pinmux framework, when a pin state is switched, the setting in the old state should be marked as "disabled". Conclusion: 1. To Remove the HW disabling operation to above the glitch mentioned above. 2. Handle the issue mentioned above by disabling all of the settings in old state and then enable the all of the settings in new state. Signed-off-by: Fan Wu <fwu@marvell.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
638 lines
16 KiB
C
638 lines
16 KiB
C
/*
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* Pinctrl driver for the Wondermedia SoC's
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*
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* Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "pinctrl-wmt.h"
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static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
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u32 mask)
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{
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u32 val;
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val = readl_relaxed(data->base + reg);
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val |= mask;
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writel_relaxed(val, data->base + reg);
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}
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static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
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u32 mask)
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{
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u32 val;
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val = readl_relaxed(data->base + reg);
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val &= ~mask;
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writel_relaxed(val, data->base + reg);
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}
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enum wmt_func_sel {
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WMT_FSEL_GPIO_IN = 0,
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WMT_FSEL_GPIO_OUT = 1,
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WMT_FSEL_ALT = 2,
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WMT_FSEL_COUNT = 3,
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};
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static const char * const wmt_functions[WMT_FSEL_COUNT] = {
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[WMT_FSEL_GPIO_IN] = "gpio_in",
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[WMT_FSEL_GPIO_OUT] = "gpio_out",
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[WMT_FSEL_ALT] = "alt",
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};
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static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
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{
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return WMT_FSEL_COUNT;
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}
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static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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return wmt_functions[selector];
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}
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static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned selector,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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/* every pin does every function */
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*groups = data->groups;
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*num_groups = data->ngroups;
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return 0;
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}
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static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
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unsigned pin)
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{
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u32 bank = WMT_BANK_FROM_PIN(pin);
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u32 bit = WMT_BIT_FROM_PIN(pin);
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u32 reg_en = data->banks[bank].reg_en;
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u32 reg_dir = data->banks[bank].reg_dir;
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if (reg_dir == NO_REG) {
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dev_err(data->dev, "pin:%d no direction register defined\n",
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pin);
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return -EINVAL;
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}
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/*
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* If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
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* disabled (as on VT8500) and that no alternate function is available.
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*/
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switch (func) {
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case WMT_FSEL_GPIO_IN:
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if (reg_en != NO_REG)
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wmt_setbits(data, reg_en, BIT(bit));
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wmt_clearbits(data, reg_dir, BIT(bit));
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break;
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case WMT_FSEL_GPIO_OUT:
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if (reg_en != NO_REG)
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wmt_setbits(data, reg_en, BIT(bit));
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wmt_setbits(data, reg_dir, BIT(bit));
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break;
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case WMT_FSEL_ALT:
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if (reg_en == NO_REG) {
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dev_err(data->dev, "pin:%d no alt function available\n",
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pin);
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return -EINVAL;
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}
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wmt_clearbits(data, reg_en, BIT(bit));
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}
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return 0;
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}
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static int wmt_pmx_enable(struct pinctrl_dev *pctldev,
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unsigned func_selector,
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unsigned group_selector)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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u32 pinnum = data->pins[group_selector].number;
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return wmt_set_pinmux(data, func_selector, pinnum);
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}
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static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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/* disable by setting GPIO_IN */
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wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
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}
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static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset,
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bool input)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
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offset);
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return 0;
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}
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static struct pinmux_ops wmt_pinmux_ops = {
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.get_functions_count = wmt_pmx_get_functions_count,
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.get_function_name = wmt_pmx_get_function_name,
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.get_function_groups = wmt_pmx_get_function_groups,
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.enable = wmt_pmx_enable,
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.gpio_disable_free = wmt_pmx_gpio_disable_free,
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.gpio_set_direction = wmt_pmx_gpio_set_direction,
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};
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static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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return data->ngroups;
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}
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static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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return data->groups[selector];
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}
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static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned selector,
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const unsigned **pins,
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unsigned *num_pins)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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*pins = &data->pins[selector].number;
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*num_pins = 1;
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return 0;
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}
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static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
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{
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int i;
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for (i = 0; i < data->npins; i++) {
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if (data->pins[i].number == pin)
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return i;
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}
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return -EINVAL;
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}
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static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
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struct device_node *np,
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u32 pin, u32 fnum,
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struct pinctrl_map **maps)
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{
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int group;
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struct pinctrl_map *map = *maps;
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if (fnum >= ARRAY_SIZE(wmt_functions)) {
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dev_err(data->dev, "invalid wm,function %d\n", fnum);
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return -EINVAL;
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}
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group = wmt_pctl_find_group_by_pin(data, pin);
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if (group < 0) {
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dev_err(data->dev, "unable to match pin %d to group\n", pin);
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return group;
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}
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map->type = PIN_MAP_TYPE_MUX_GROUP;
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map->data.mux.group = data->groups[group];
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map->data.mux.function = wmt_functions[fnum];
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(*maps)++;
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return 0;
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}
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static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
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struct device_node *np,
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u32 pin, u32 pull,
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struct pinctrl_map **maps)
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{
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int group;
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unsigned long *configs;
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struct pinctrl_map *map = *maps;
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if (pull > 2) {
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dev_err(data->dev, "invalid wm,pull %d\n", pull);
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return -EINVAL;
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}
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group = wmt_pctl_find_group_by_pin(data, pin);
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if (group < 0) {
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dev_err(data->dev, "unable to match pin %d to group\n", pin);
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return group;
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}
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configs = kzalloc(sizeof(*configs), GFP_KERNEL);
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if (!configs)
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return -ENOMEM;
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switch (pull) {
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case 0:
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configs[0] = PIN_CONFIG_BIAS_DISABLE;
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break;
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case 1:
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configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
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break;
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case 2:
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configs[0] = PIN_CONFIG_BIAS_PULL_UP;
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break;
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default:
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configs[0] = PIN_CONFIG_BIAS_DISABLE;
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dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
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}
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map->type = PIN_MAP_TYPE_CONFIGS_PIN;
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map->data.configs.group_or_pin = data->groups[group];
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map->data.configs.configs = configs;
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map->data.configs.num_configs = 1;
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(*maps)++;
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return 0;
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}
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static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *maps,
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unsigned num_maps)
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{
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int i;
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for (i = 0; i < num_maps; i++)
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if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
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kfree(maps[i].data.configs.configs);
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kfree(maps);
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}
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static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map,
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unsigned *num_maps)
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{
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struct pinctrl_map *maps, *cur_map;
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struct property *pins, *funcs, *pulls;
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u32 pin, func, pull;
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int num_pins, num_funcs, num_pulls, maps_per_pin;
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int i, err;
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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pins = of_find_property(np, "wm,pins", NULL);
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if (!pins) {
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dev_err(data->dev, "missing wmt,pins property\n");
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return -EINVAL;
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}
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funcs = of_find_property(np, "wm,function", NULL);
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pulls = of_find_property(np, "wm,pull", NULL);
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if (!funcs && !pulls) {
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dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
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return -EINVAL;
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}
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/*
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* The following lines calculate how many values are defined for each
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* of the properties.
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*/
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num_pins = pins->length / sizeof(u32);
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num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
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num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
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if (num_funcs > 1 && num_funcs != num_pins) {
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dev_err(data->dev, "wm,function must have 1 or %d entries\n",
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num_pins);
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return -EINVAL;
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}
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if (num_pulls > 1 && num_pulls != num_pins) {
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dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
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num_pins);
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return -EINVAL;
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}
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maps_per_pin = 0;
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if (num_funcs)
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maps_per_pin++;
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if (num_pulls)
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maps_per_pin++;
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cur_map = maps = kzalloc(num_pins * maps_per_pin * sizeof(*maps),
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GFP_KERNEL);
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if (!maps)
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return -ENOMEM;
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for (i = 0; i < num_pins; i++) {
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err = of_property_read_u32_index(np, "wm,pins", i, &pin);
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if (err)
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goto fail;
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if (pin >= (data->nbanks * 32)) {
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dev_err(data->dev, "invalid wm,pins value\n");
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err = -EINVAL;
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goto fail;
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}
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if (num_funcs) {
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err = of_property_read_u32_index(np, "wm,function",
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(num_funcs > 1 ? i : 0), &func);
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if (err)
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goto fail;
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err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
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&cur_map);
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if (err)
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goto fail;
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}
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if (num_pulls) {
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err = of_property_read_u32_index(np, "wm,pull",
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(num_pulls > 1 ? i : 0), &pull);
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if (err)
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goto fail;
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err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
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&cur_map);
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if (err)
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goto fail;
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}
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}
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*map = maps;
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*num_maps = num_pins * maps_per_pin;
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return 0;
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/*
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* The fail path removes any maps that have been allocated. The fail path is
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* only called from code after maps has been kzalloc'd. It is also safe to
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* pass 'num_pins * maps_per_pin' as the map count even though we probably
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* failed before all the mappings were read as all maps are allocated at once,
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* and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
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* is no failpath where a config can be allocated without .type being set.
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*/
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fail:
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wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
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return err;
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}
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static struct pinctrl_ops wmt_pctl_ops = {
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.get_groups_count = wmt_get_groups_count,
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.get_group_name = wmt_get_group_name,
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.get_group_pins = wmt_get_group_pins,
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.dt_node_to_map = wmt_pctl_dt_node_to_map,
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.dt_free_map = wmt_pctl_dt_free_map,
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};
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static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long *config)
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{
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return -ENOTSUPP;
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}
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static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long *configs, unsigned num_configs)
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{
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struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param;
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u16 arg;
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u32 bank = WMT_BANK_FROM_PIN(pin);
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u32 bit = WMT_BIT_FROM_PIN(pin);
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u32 reg_pull_en = data->banks[bank].reg_pull_en;
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u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
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int i;
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if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
|
|
dev_err(data->dev, "bias functions not supported on pin %d\n",
|
|
pin);
|
|
return -EINVAL;
|
|
}
|
|
|
|
for (i = 0; i < num_configs; i++) {
|
|
param = pinconf_to_config_param(configs[i]);
|
|
arg = pinconf_to_config_argument(configs[i]);
|
|
|
|
if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
|
|
(param == PIN_CONFIG_BIAS_PULL_UP)) {
|
|
if (arg == 0)
|
|
param = PIN_CONFIG_BIAS_DISABLE;
|
|
}
|
|
|
|
switch (param) {
|
|
case PIN_CONFIG_BIAS_DISABLE:
|
|
wmt_clearbits(data, reg_pull_en, BIT(bit));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
wmt_clearbits(data, reg_pull_cfg, BIT(bit));
|
|
wmt_setbits(data, reg_pull_en, BIT(bit));
|
|
break;
|
|
case PIN_CONFIG_BIAS_PULL_UP:
|
|
wmt_setbits(data, reg_pull_cfg, BIT(bit));
|
|
wmt_setbits(data, reg_pull_en, BIT(bit));
|
|
break;
|
|
default:
|
|
dev_err(data->dev, "unknown pinconf param\n");
|
|
return -EINVAL;
|
|
}
|
|
} /* for each config */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct pinconf_ops wmt_pinconf_ops = {
|
|
.pin_config_get = wmt_pinconf_get,
|
|
.pin_config_set = wmt_pinconf_set,
|
|
};
|
|
|
|
static struct pinctrl_desc wmt_desc = {
|
|
.owner = THIS_MODULE,
|
|
.name = "pinctrl-wmt",
|
|
.pctlops = &wmt_pctl_ops,
|
|
.pmxops = &wmt_pinmux_ops,
|
|
.confops = &wmt_pinconf_ops,
|
|
};
|
|
|
|
static int wmt_gpio_request(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
return pinctrl_request_gpio(chip->base + offset);
|
|
}
|
|
|
|
static void wmt_gpio_free(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
pinctrl_free_gpio(chip->base + offset);
|
|
}
|
|
|
|
static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
|
|
u32 bank = WMT_BANK_FROM_PIN(offset);
|
|
u32 bit = WMT_BIT_FROM_PIN(offset);
|
|
u32 reg_dir = data->banks[bank].reg_dir;
|
|
u32 val;
|
|
|
|
val = readl_relaxed(data->base + reg_dir);
|
|
if (val & BIT(bit))
|
|
return GPIOF_DIR_OUT;
|
|
else
|
|
return GPIOF_DIR_IN;
|
|
}
|
|
|
|
static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
|
|
u32 bank = WMT_BANK_FROM_PIN(offset);
|
|
u32 bit = WMT_BIT_FROM_PIN(offset);
|
|
u32 reg_data_in = data->banks[bank].reg_data_in;
|
|
|
|
if (reg_data_in == NO_REG) {
|
|
dev_err(data->dev, "no data in register defined\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
|
|
}
|
|
|
|
static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
|
|
int val)
|
|
{
|
|
struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev);
|
|
u32 bank = WMT_BANK_FROM_PIN(offset);
|
|
u32 bit = WMT_BIT_FROM_PIN(offset);
|
|
u32 reg_data_out = data->banks[bank].reg_data_out;
|
|
|
|
if (reg_data_out == NO_REG) {
|
|
dev_err(data->dev, "no data out register defined\n");
|
|
return;
|
|
}
|
|
|
|
if (val)
|
|
wmt_setbits(data, reg_data_out, BIT(bit));
|
|
else
|
|
wmt_clearbits(data, reg_data_out, BIT(bit));
|
|
}
|
|
|
|
static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
|
|
{
|
|
return pinctrl_gpio_direction_input(chip->base + offset);
|
|
}
|
|
|
|
static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
|
|
int value)
|
|
{
|
|
wmt_gpio_set_value(chip, offset, value);
|
|
return pinctrl_gpio_direction_output(chip->base + offset);
|
|
}
|
|
|
|
static struct gpio_chip wmt_gpio_chip = {
|
|
.label = "gpio-wmt",
|
|
.owner = THIS_MODULE,
|
|
.request = wmt_gpio_request,
|
|
.free = wmt_gpio_free,
|
|
.get_direction = wmt_gpio_get_direction,
|
|
.direction_input = wmt_gpio_direction_input,
|
|
.direction_output = wmt_gpio_direction_output,
|
|
.get = wmt_gpio_get_value,
|
|
.set = wmt_gpio_set_value,
|
|
.can_sleep = false,
|
|
};
|
|
|
|
int wmt_pinctrl_probe(struct platform_device *pdev,
|
|
struct wmt_pinctrl_data *data)
|
|
{
|
|
int err;
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
data->base = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(data->base))
|
|
return PTR_ERR(data->base);
|
|
|
|
wmt_desc.pins = data->pins;
|
|
wmt_desc.npins = data->npins;
|
|
|
|
data->gpio_chip = wmt_gpio_chip;
|
|
data->gpio_chip.dev = &pdev->dev;
|
|
data->gpio_chip.of_node = pdev->dev.of_node;
|
|
data->gpio_chip.ngpio = data->nbanks * 32;
|
|
|
|
platform_set_drvdata(pdev, data);
|
|
|
|
data->dev = &pdev->dev;
|
|
|
|
data->pctl_dev = pinctrl_register(&wmt_desc, &pdev->dev, data);
|
|
if (!data->pctl_dev) {
|
|
dev_err(&pdev->dev, "Failed to register pinctrl\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
err = gpiochip_add(&data->gpio_chip);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "could not add GPIO chip\n");
|
|
goto fail_gpio;
|
|
}
|
|
|
|
err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
|
|
0, 0, data->nbanks * 32);
|
|
if (err)
|
|
goto fail_range;
|
|
|
|
dev_info(&pdev->dev, "Pin controller initialized\n");
|
|
|
|
return 0;
|
|
|
|
fail_range:
|
|
if (gpiochip_remove(&data->gpio_chip))
|
|
dev_err(&pdev->dev, "failed to remove gpio chip\n");
|
|
fail_gpio:
|
|
pinctrl_unregister(data->pctl_dev);
|
|
return err;
|
|
}
|
|
|
|
int wmt_pinctrl_remove(struct platform_device *pdev)
|
|
{
|
|
struct wmt_pinctrl_data *data = platform_get_drvdata(pdev);
|
|
int err;
|
|
|
|
err = gpiochip_remove(&data->gpio_chip);
|
|
if (err)
|
|
dev_err(&pdev->dev, "failed to remove gpio chip\n");
|
|
|
|
pinctrl_unregister(data->pctl_dev);
|
|
|
|
return 0;
|
|
}
|