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c41b16f8c9
Consolidate the FPGA IRQ handling code. Integrator/AP and Versatile have one FPGA-based IRQ handler each. Integrator/CP has three. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
/*
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* arch/arm/mach-versatile/include/mach/hardware.h
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*
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* This file contains the hardware definitions of the Versatile boards.
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*
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* Copyright (C) 2003 ARM Limited.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <asm/sizes.h>
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/*
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* PCI space virtual addresses
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*/
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#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul
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#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul
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/* CIK guesswork */
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#define PCIBIOS_MIN_IO 0x44000000
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#define PCIBIOS_MIN_MEM 0x50000000
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#define pcibios_assign_all_busses() 1
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/* macro to get at IO space when running virtually */
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#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
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#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
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#endif
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