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linux/arch/ppc
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Stefan Roese f4151b9ba8 [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG 
Right now TLB entry 0 ist used as UART0 mapping for the early debug
output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
bridges and/or switches on 440SPe platforms). This will overwrite the
TLB 0 entry and further debug output's may crash/hang the system.

This patch moves the early debug UART0 TLB entry from 0 to 62 as done
in arch/powerpc. This way it is in the "pinned" area and will not get
overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
newer code from arch/powerpc.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:31:16 -06:00
..
4xx_io [POWERPC] Spelling fixes: arch/ppc/ 2007-05-12 11:32:49 +10:00
8xx_io [PPC] Fix cpm_dpram_addr returning phys mem instead of virt mem 2007-09-28 10:25:32 -05:00
8260_io [NET]: Kill eth_copy_and_sum(). 2007-07-10 22:08:12 -07:00
boot kbuild: restore arch/{ppc/xtensa}/boot cflags 2007-10-20 20:35:23 +02:00
configs [POWERPC] Remove xmon from ml300 and ml403 defconfig in arch/ppc 2007-12-03 10:08:53 +11:00
kernel [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG 2007-12-23 13:31:16 -06:00
lib [POWERPC] User rheap from arch/powerpc/lib 2007-05-09 23:28:17 -05:00
mm [POWERPC] 4xx: Fix TLB 0 problem with CONFIG_SERIAL_TEXT_DEBUG 2007-12-23 13:31:16 -06:00
platforms [POWERPC] arch/ppc: Remove an unnecessary pci_dev_put 2007-12-20 17:13:50 +11:00
syslib [POWERPC] arch/ppc: Remove duplicate includes 2007-12-20 17:13:50 +11:00
xmon [POWERPC] arch/ppc: Remove duplicate includes 2007-12-20 17:13:50 +11:00
.gitignore [POWERPC] Only ignore arch/ppc/include, not arch/ppc/boot/include 2007-08-17 11:01:51 +10:00
Kconfig Combine instrumentation menus in kernel/Kconfig.instrumentation 2007-10-19 11:53:54 -07:00
Kconfig.debug
Makefile kbuild: enable 'make CPPFLAGS=...' to add additional options to CPP 2007-10-15 22:17:25 +02:00