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3eab8095ef
With a generic plat_irq_dispatch (for Alchemy at least) code for both interrupt controller types can coexist in a single kernel image and be autodetected at runtime. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
15 lines
376 B
Makefile
15 lines
376 B
Makefile
#
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# Copyright 2000, 2008 MontaVista Software Inc.
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# Author: MontaVista Software, Inc. <source@mvista.com>
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#
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# Makefile for the Alchemy Au1xx0 CPUs, generic files.
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#
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obj-y += prom.o time.o clocks.o platform.o power.o setup.o \
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sleeper.o dma.o dbdma.o vss.o irq.o
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# optional gpiolib support
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ifeq ($(CONFIG_ALCHEMY_GPIO_INDIRECT),)
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obj-$(CONFIG_GPIOLIB) += gpiolib.o
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endif
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