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150 lines
3.6 KiB
C
150 lines
3.6 KiB
C
/*
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* IP32 basic setup
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2000 Harald Koerfgen
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* Copyright (C) 2002, 2003, 2005 Ilya A. Volynets
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* Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/mc146818rtc.h>
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#include <linux/param.h>
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#include <linux/sched.h>
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#include <asm/bootinfo.h>
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#include <asm/mc146818-time.h>
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#include <asm/mipsregs.h>
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#include <asm/mmu_context.h>
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#include <asm/sgialib.h>
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#include <asm/time.h>
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#include <asm/traps.h>
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#include <asm/io.h>
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#include <asm/ip32/crime.h>
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#include <asm/ip32/mace.h>
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#include <asm/ip32/ip32_ints.h>
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extern void ip32_be_init(void);
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extern void crime_init(void);
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#ifdef CONFIG_SGI_O2MACE_ETH
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/*
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* This is taken care of in here 'cause they say using Arc later on is
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* problematic
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*/
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extern char o2meth_eaddr[8];
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static inline unsigned char str2hexnum(unsigned char c)
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{
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if (c >= '0' && c <= '9')
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return c - '0';
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if (c >= 'a' && c <= 'f')
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return c - 'a' + 10;
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return 0; /* foo */
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}
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static inline void str2eaddr(unsigned char *ea, unsigned char *str)
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{
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int i;
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for (i = 0; i < 6; i++) {
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unsigned char num;
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if(*str == ':')
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str++;
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num = str2hexnum(*str++) << 4;
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num |= (str2hexnum(*str++));
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ea[i] = num;
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}
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}
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#endif
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#ifdef CONFIG_SERIAL_8250
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#endif /* CONFIG_SERIAL_8250 */
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/* An arbitrary time; this can be decreased if reliability looks good */
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#define WAIT_MS 10
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void __init ip32_time_init(void)
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{
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printk(KERN_INFO "Calibrating system timer... ");
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write_c0_count(0);
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crime->timer = 0;
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while (crime->timer < CRIME_MASTER_FREQ * WAIT_MS / 1000) ;
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mips_hpt_frequency = read_c0_count() * 1000 / WAIT_MS;
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printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
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}
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void __init plat_timer_setup(struct irqaction *irq)
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{
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irq->handler = no_action;
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setup_irq(IP32_R4K_TIMER_IRQ, irq);
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}
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void __init plat_mem_setup(void)
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{
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board_be_init = ip32_be_init;
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rtc_mips_get_time = mc146818_get_cmos_time;
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rtc_mips_set_mmss = mc146818_set_rtc_mmss;
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board_time_init = ip32_time_init;
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#ifdef CONFIG_SERIAL_8250
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{
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static struct uart_port o2_serial[2];
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memset(o2_serial, 0, sizeof(o2_serial));
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o2_serial[0].type = PORT_16550A;
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o2_serial[0].line = 0;
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o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
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o2_serial[0].flags = UPF_SKIP_TEST;
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o2_serial[0].uartclk = 1843200;
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o2_serial[0].iotype = UPIO_MEM;
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o2_serial[0].membase = (char *)&mace->isa.serial1;
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o2_serial[0].fifosize = 14;
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/* How much to shift register offset by. Each UART register
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* is replicated over 256 byte space */
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o2_serial[0].regshift = 8;
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o2_serial[1].type = PORT_16550A;
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o2_serial[1].line = 1;
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o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
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o2_serial[1].flags = UPF_SKIP_TEST;
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o2_serial[1].uartclk = 1843200;
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o2_serial[1].iotype = UPIO_MEM;
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o2_serial[1].membase = (char *)&mace->isa.serial2;
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o2_serial[1].fifosize = 14;
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o2_serial[1].regshift = 8;
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early_serial_setup(&o2_serial[0]);
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early_serial_setup(&o2_serial[1]);
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}
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#endif
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#ifdef CONFIG_SGI_O2MACE_ETH
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{
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char *mac = ArcGetEnvironmentVariable("eaddr");
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str2eaddr(o2meth_eaddr, mac);
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}
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#endif
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#if defined(CONFIG_SERIAL_CORE_CONSOLE)
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{
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char* con = ArcGetEnvironmentVariable("console");
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if (con && *con == 'd') {
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static char options[8];
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char *baud = ArcGetEnvironmentVariable("dbaud");
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if (baud)
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strcpy(options, baud);
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add_preferred_console("ttyS", *(con + 1) == '2' ? 1 : 0,
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baud ? options : NULL);
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}
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}
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#endif
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}
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