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0f1bc12e9e
Under some circumstances the PLLE needs to be retrained, in which case access to the PMC registers is required. Fix this by passing a pointer to the PMC registers instead of NULL when registering the PLLE clock. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
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mmp | ||
mvebu | ||
mxs | ||
socfpga | ||
spear | ||
tegra | ||
ux500 | ||
versatile | ||
x86 | ||
clk-bcm2835.c | ||
clk-devres.c | ||
clk-divider.c | ||
clk-fixed-factor.c | ||
clk-fixed-rate.c | ||
clk-gate.c | ||
clk-highbank.c | ||
clk-ls1x.c | ||
clk-max77686.c | ||
clk-mux.c | ||
clk-nomadik.c | ||
clk-prima2.c | ||
clk-twl6040.c | ||
clk-u300.c | ||
clk-vt8500.c | ||
clk-wm831x.c | ||
clk-zynq.c | ||
clk.c | ||
clkdev.c | ||
Kconfig | ||
Makefile |