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345 lines
8.4 KiB
C
345 lines
8.4 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
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* Copyright (C) 1999 Andrew R. Baker (andrewb@uab.edu)
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* Copyright (C) 2001 Florian Lohoff (flo@rfc822.org)
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* Copyright (C) 2003 Ralf Baechle (ralf@linux-mips.org)
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*
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* (In all truth, Jed Schimmel wrote all this code.)
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/blkdev.h>
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#include <linux/version.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/spinlock.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/sgialib.h>
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#include <asm/sgi/sgi.h>
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#include <asm/sgi/mc.h>
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#include <asm/sgi/hpc3.h>
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#include <asm/sgi/ip22.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "wd33c93.h"
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#include "sgiwd93.h"
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#include <linux/stat.h>
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#if 0
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#define DPRINTK(args...) printk(args)
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#else
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#define DPRINTK(args...)
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#endif
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#define HDATA(ptr) ((struct ip22_hostdata *)((ptr)->hostdata))
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struct ip22_hostdata {
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struct WD33C93_hostdata wh;
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struct hpc_data {
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dma_addr_t dma;
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void * cpu;
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} hd;
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};
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struct hpc_chunk {
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struct hpc_dma_desc desc;
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u32 _padding; /* align to quadword boundary */
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};
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struct Scsi_Host *sgiwd93_host;
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struct Scsi_Host *sgiwd93_host1;
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/* Wuff wuff, wuff, wd33c93.c, wuff wuff, object oriented, bow wow. */
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static inline void write_wd33c93_count(const wd33c93_regs regs,
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unsigned long value)
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{
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*regs.SASR = WD_TRANSFER_COUNT_MSB;
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mb();
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*regs.SCMD = ((value >> 16) & 0xff);
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*regs.SCMD = ((value >> 8) & 0xff);
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*regs.SCMD = ((value >> 0) & 0xff);
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mb();
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}
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static inline unsigned long read_wd33c93_count(const wd33c93_regs regs)
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{
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unsigned long value;
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*regs.SASR = WD_TRANSFER_COUNT_MSB;
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mb();
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value = ((*regs.SCMD & 0xff) << 16);
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value |= ((*regs.SCMD & 0xff) << 8);
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value |= ((*regs.SCMD & 0xff) << 0);
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mb();
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return value;
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}
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static irqreturn_t sgiwd93_intr(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct Scsi_Host * host = (struct Scsi_Host *) dev_id;
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unsigned long flags;
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spin_lock_irqsave(host->host_lock, flags);
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wd33c93_intr(host);
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spin_unlock_irqrestore(host->host_lock, flags);
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return IRQ_HANDLED;
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}
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static inline
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void fill_hpc_entries(struct hpc_chunk *hcp, Scsi_Cmnd *cmd, int datainp)
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{
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unsigned long len = cmd->SCp.this_residual;
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void *addr = cmd->SCp.ptr;
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dma_addr_t physaddr;
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unsigned long count;
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physaddr = dma_map_single(NULL, addr, len, cmd->sc_data_direction);
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cmd->SCp.dma_handle = physaddr;
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while (len) {
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/*
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* even cntinfo could be up to 16383, without
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* magic only 8192 works correctly
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*/
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count = len > 8192 ? 8192 : len;
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hcp->desc.pbuf = physaddr;
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hcp->desc.cntinfo = count;
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hcp++;
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len -= count;
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physaddr += count;
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}
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/*
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* To make sure, if we trip an HPC bug, that we transfer every single
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* byte, we tag on an extra zero length dma descriptor at the end of
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* the chain.
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*/
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hcp->desc.pbuf = 0;
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hcp->desc.cntinfo = HPCDMA_EOX;
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}
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static int dma_setup(Scsi_Cmnd *cmd, int datainp)
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{
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struct ip22_hostdata *hdata = HDATA(cmd->device->host);
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struct hpc3_scsiregs *hregs =
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(struct hpc3_scsiregs *) cmd->device->host->base;
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struct hpc_chunk *hcp = (struct hpc_chunk *) hdata->hd.cpu;
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DPRINTK("dma_setup: datainp<%d> hcp<%p> ", datainp, hcp);
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hdata->wh.dma_dir = datainp;
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/*
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* wd33c93 shouldn't pass us bogus dma_setups, but it does:-( The
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* other wd33c93 drivers deal with it the same way (which isn't that
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* obvious). IMHO a better fix would be, not to do these dma setups
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* in the first place.
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*/
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if (cmd->SCp.ptr == NULL || cmd->SCp.this_residual == 0)
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return 1;
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fill_hpc_entries(hcp, cmd, datainp);
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DPRINTK(" HPCGO\n");
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/* Start up the HPC. */
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hregs->ndptr = hdata->hd.dma;
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if (datainp)
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hregs->ctrl = HPC3_SCTRL_ACTIVE;
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else
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hregs->ctrl = HPC3_SCTRL_ACTIVE | HPC3_SCTRL_DIR;
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return 0;
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}
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static void dma_stop(struct Scsi_Host *instance, Scsi_Cmnd *SCpnt,
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int status)
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{
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struct ip22_hostdata *hdata = HDATA(instance);
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struct hpc3_scsiregs *hregs;
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if (!SCpnt)
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return;
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hregs = (struct hpc3_scsiregs *) SCpnt->device->host->base;
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DPRINTK("dma_stop: status<%d> ", status);
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/* First stop the HPC and flush it's FIFO. */
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if (hdata->wh.dma_dir) {
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hregs->ctrl |= HPC3_SCTRL_FLUSH;
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while (hregs->ctrl & HPC3_SCTRL_ACTIVE)
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barrier();
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}
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hregs->ctrl = 0;
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dma_unmap_single(NULL, SCpnt->SCp.dma_handle, SCpnt->SCp.this_residual,
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SCpnt->sc_data_direction);
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DPRINTK("\n");
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}
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void sgiwd93_reset(unsigned long base)
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{
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struct hpc3_scsiregs *hregs = (struct hpc3_scsiregs *) base;
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hregs->ctrl = HPC3_SCTRL_CRESET;
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udelay(50);
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hregs->ctrl = 0;
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}
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static inline void init_hpc_chain(struct hpc_data *hd)
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{
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struct hpc_chunk *hcp = (struct hpc_chunk *) hd->cpu;
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struct hpc_chunk *dma = (struct hpc_chunk *) hd->dma;
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unsigned long start, end;
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start = (unsigned long) hcp;
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end = start + PAGE_SIZE;
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while (start < end) {
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hcp->desc.pnext = (u32) (dma + 1);
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hcp->desc.cntinfo = HPCDMA_EOX;
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hcp++; dma++;
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start += sizeof(struct hpc_chunk);
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};
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hcp--;
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hcp->desc.pnext = hd->dma;
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}
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static struct Scsi_Host * __init sgiwd93_setup_scsi(
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Scsi_Host_Template *SGIblows, int unit, int irq,
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struct hpc3_scsiregs *hregs, unsigned char *wdregs)
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{
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struct ip22_hostdata *hdata;
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struct Scsi_Host *host;
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wd33c93_regs regs;
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host = scsi_register(SGIblows, sizeof(struct ip22_hostdata));
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if (!host)
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return NULL;
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host->base = (unsigned long) hregs;
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host->irq = irq;
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hdata = HDATA(host);
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hdata->hd.cpu = dma_alloc_coherent(NULL, PAGE_SIZE, &hdata->hd.dma,
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GFP_KERNEL);
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if (!hdata->hd.cpu) {
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printk(KERN_WARNING "sgiwd93: Could not allocate memory for "
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"host %d buffer.\n", unit);
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goto out_unregister;
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}
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init_hpc_chain(&hdata->hd);
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regs.SASR = wdregs + 3;
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regs.SCMD = wdregs + 7;
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wd33c93_init(host, regs, dma_setup, dma_stop, WD33C93_FS_16_20);
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hdata->wh.no_sync = 0;
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if (request_irq(irq, sgiwd93_intr, 0, "SGI WD93", (void *) host)) {
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printk(KERN_WARNING "sgiwd93: Could not register irq %d "
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"for host %d.\n", irq, unit);
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goto out_free;
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}
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return host;
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out_free:
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dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
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wd33c93_release();
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out_unregister:
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scsi_unregister(host);
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return NULL;
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}
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int __init sgiwd93_detect(Scsi_Host_Template *SGIblows)
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{
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int found = 0;
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SGIblows->proc_name = "SGIWD93";
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sgiwd93_host = sgiwd93_setup_scsi(SGIblows, 0, SGI_WD93_0_IRQ,
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&hpc3c0->scsi_chan0,
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(unsigned char *)hpc3c0->scsi0_ext);
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if (sgiwd93_host)
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found++;
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/* Set up second controller on the Indigo2 */
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if (ip22_is_fullhouse()) {
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sgiwd93_host1 = sgiwd93_setup_scsi(SGIblows, 1, SGI_WD93_1_IRQ,
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&hpc3c0->scsi_chan1,
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(unsigned char *)hpc3c0->scsi1_ext);
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if (sgiwd93_host1)
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found++;
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}
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return found;
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}
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int sgiwd93_release(struct Scsi_Host *instance)
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{
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struct ip22_hostdata *hdata = HDATA(instance);
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int irq = 0;
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if (sgiwd93_host && sgiwd93_host == instance)
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irq = SGI_WD93_0_IRQ;
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else if (sgiwd93_host1 && sgiwd93_host1 == instance)
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irq = SGI_WD93_1_IRQ;
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free_irq(irq, sgiwd93_intr);
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dma_free_coherent(NULL, PAGE_SIZE, hdata->hd.cpu, hdata->hd.dma);
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wd33c93_release();
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return 1;
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}
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static int sgiwd93_bus_reset(Scsi_Cmnd *cmd)
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{
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/* FIXME perform bus-specific reset */
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/* FIXME 2: kill this function, and let midlayer fallback
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to the same result, calling wd33c93_host_reset() */
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spin_lock_irq(cmd->device->host->host_lock);
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wd33c93_host_reset(cmd);
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spin_unlock_irq(cmd->device->host->host_lock);
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return SUCCESS;
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}
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/*
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* Kludge alert - the SCSI code calls the abort and reset method with int
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* arguments not with pointers. So this is going to blow up beautyfully
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* on 64-bit systems with memory outside the compat address spaces.
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*/
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static Scsi_Host_Template driver_template = {
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.proc_name = "SGIWD93",
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.name = "SGI WD93",
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.detect = sgiwd93_detect,
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.release = sgiwd93_release,
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.queuecommand = wd33c93_queuecommand,
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.eh_abort_handler = wd33c93_abort,
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.eh_bus_reset_handler = sgiwd93_bus_reset,
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.eh_host_reset_handler = wd33c93_host_reset,
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.can_queue = CAN_QUEUE,
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.this_id = 7,
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.sg_tablesize = SG_ALL,
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.cmd_per_lun = CMD_PER_LUN,
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.use_clustering = DISABLE_CLUSTERING,
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};
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#include "scsi_module.c"
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