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07a801def4
0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old
version of the documentation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
86 lines
1.9 KiB
C
86 lines
1.9 KiB
C
/*
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* Copyright (C) 2005 Mips Technologies
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* Author: Chris Dearman, chris@mips.com derived from fpu.h
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef _ASM_DSP_H
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#define _ASM_DSP_H
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#include <asm/cpu.h>
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#include <asm/cpu-features.h>
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#include <asm/hazards.h>
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#include <asm/mipsregs.h>
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#define DSP_DEFAULT 0x00000000
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#define DSP_MASK 0x3ff
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#define __enable_dsp_hazard() \
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do { \
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asm("_ehb"); \
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} while (0)
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static inline void __init_dsp(void)
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{
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mthi1(0);
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mtlo1(0);
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mthi2(0);
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mtlo2(0);
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mthi3(0);
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mtlo3(0);
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wrdsp(DSP_DEFAULT, DSP_MASK);
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}
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static inline void init_dsp(void)
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{
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if (cpu_has_dsp)
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__init_dsp();
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}
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#define __save_dsp(tsk) \
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do { \
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tsk->thread.dsp.dspr[0] = mfhi1(); \
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tsk->thread.dsp.dspr[1] = mflo1(); \
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tsk->thread.dsp.dspr[2] = mfhi2(); \
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tsk->thread.dsp.dspr[3] = mflo2(); \
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tsk->thread.dsp.dspr[4] = mfhi3(); \
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tsk->thread.dsp.dspr[5] = mflo3(); \
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tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \
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} while (0)
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#define save_dsp(tsk) \
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do { \
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if (cpu_has_dsp) \
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__save_dsp(tsk); \
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} while (0)
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#define __restore_dsp(tsk) \
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do { \
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mthi1(tsk->thread.dsp.dspr[0]); \
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mtlo1(tsk->thread.dsp.dspr[1]); \
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mthi2(tsk->thread.dsp.dspr[2]); \
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mtlo2(tsk->thread.dsp.dspr[3]); \
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mthi3(tsk->thread.dsp.dspr[4]); \
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mtlo3(tsk->thread.dsp.dspr[5]); \
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wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \
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} while (0)
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#define restore_dsp(tsk) \
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do { \
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if (cpu_has_dsp) \
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__restore_dsp(tsk); \
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} while (0)
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#define __get_dsp_regs(tsk) \
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({ \
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if (tsk == current) \
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__save_dsp(current); \
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\
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tsk->thread.dsp.dspr; \
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})
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#endif /* _ASM_DSP_H */
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