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* ARC700 has VIPT L1 Caches * Caches don't snoop and are not coherent * Given the PAGE_SIZE and Cache associativity, we don't support aliasing D$ configurations (yet), but do allow aliasing I$ configs Signed-off-by: Vineet Gupta <vgupta@synopsys.com> |
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boot | ||
include/asm | ||
kernel | ||
lib | ||
mm | ||
plat-arcfpga | ||
Kbuild | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |