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96c5590058
The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> |
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.. | ||
acpi.c | ||
amd_bus.c | ||
broadcom_bus.c | ||
bus_numa.c | ||
bus_numa.h | ||
ce4100.c | ||
common.c | ||
direct.c | ||
early.c | ||
fixup.c | ||
i386.c | ||
init.c | ||
irq.c | ||
legacy.c | ||
Makefile | ||
mmconfig_32.c | ||
mmconfig_64.c | ||
mmconfig-shared.c | ||
mrst.c | ||
numaq_32.c | ||
olpc.c | ||
pcbios.c | ||
visws.c | ||
xen.c |