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The TLB handlers need to check for huge pages and give them special handling. Huge pages consist of two contiguous sub-pages of physical memory. * Loading entrylo0 and entrylo1 need to be handled specially. * The page mask must be set for huge pages and then restored after writing the TLB entries. * The PTE for huge pages resides in the PMD, we halt traversal of the tables there. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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.. | ||
c-octeon.c | ||
c-r3k.c | ||
c-r4k.c | ||
c-tx39.c | ||
cache.c | ||
cerr-sb1.c | ||
cex-gen.S | ||
cex-oct.S | ||
cex-sb1.S | ||
dma-default.c | ||
extable.c | ||
fault.c | ||
highmem.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap.c | ||
Makefile | ||
page.c | ||
pgtable-32.c | ||
pgtable-64.c | ||
sc-ip22.c | ||
sc-mips.c | ||
sc-r5k.c | ||
sc-rm7k.c | ||
tlb-r3k.c | ||
tlb-r4k.c | ||
tlb-r8k.c | ||
tlbex-fault.S | ||
tlbex.c | ||
uasm.c | ||
uasm.h |