Peter Ujfalusi 9d87a8888c ASoC: tas2552: Add support for pll and pdm source clock selection
Instead of hard wiring the PLL_CLKIN and PDM_CLK to be sourced from BCLK add
proper clock configuration via the set_dai_sysclk callback.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-05 18:53:33 +01:00
..
2015-04-15 15:41:41 -07:00
2015-04-05 18:04:27 +02:00