linux/arch/powerpc/mm
Paul Mackerras 9e368f2915 KVM: PPC: book3s_hv: Add support for PPC970-family processors
This adds support for running KVM guests in supervisor mode on those
PPC970 processors that have a usable hypervisor mode.  Unfortunately,
Apple G5 machines have supervisor mode disabled (MSR[HV] is forced to
1), but the YDL PowerStation does have a usable hypervisor mode.

There are several differences between the PPC970 and POWER7 in how
guests are managed.  These differences are accommodated using the
CPU_FTR_ARCH_201 (PPC970) and CPU_FTR_ARCH_206 (POWER7) CPU feature
bits.  Notably, on PPC970:

* The LPCR, LPID or RMOR registers don't exist, and the functions of
  those registers are provided by bits in HID4 and one bit in HID0.

* External interrupts can be directed to the hypervisor, but unlike
  POWER7 they are masked by MSR[EE] in non-hypervisor modes and use
  SRR0/1 not HSRR0/1.

* There is no virtual RMA (VRMA) mode; the guest must use an RMO
  (real mode offset) area.

* The TLB entries are not tagged with the LPID, so it is necessary to
  flush the whole TLB on partition switch.  Furthermore, when switching
  partitions we have to ensure that no other CPU is executing the tlbie
  or tlbsync instructions in either the old or the new partition,
  otherwise undefined behaviour can occur.

* The PMU has 8 counters (PMC registers) rather than 6.

* The DSCR, PURR, SPURR, AMR, AMOR, UAMOR registers don't exist.

* The SLB has 64 entries rather than 32.

* There is no mediated external interrupt facility, so if we switch to
  a guest that has a virtual external interrupt pending but the guest
  has MSR[EE] = 0, we have to arrange to have an interrupt pending for
  it so that we can get control back once it re-enables interrupts.  We
  do that by sending ourselves an IPI with smp_send_reschedule after
  hard-disabling interrupts.

Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2011-07-12 13:16:59 +03:00
..
40x_mmu.c memblock: Remove rmo_size, burry it in arch/powerpc where it belongs 2010-08-05 12:56:08 +10:00
44x_mmu.c memblock: Remove rmo_size, burry it in arch/powerpc where it belongs 2010-08-05 12:56:08 +10:00
dma-noncoherent.c powerpc: Implement dma_mmap_coherent() 2011-03-30 10:44:00 +11:00
fault.c arch/powerpc: use printk_ratelimited instead of printk_ratelimit 2011-06-29 15:31:01 +10:00
fsl_booke_mmu.c Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 2010-10-21 21:19:54 -07:00
gup.c thp: alter compound get_page/put_page 2011-01-13 17:32:39 -08:00
hash_low_32.S powerpc: Use names rather than numbers for SPRGs (v2) 2009-08-20 10:12:27 +10:00
hash_low_64.S powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
hash_native_64.c KVM: PPC: book3s_hv: Add support for PPC970-family processors 2011-07-12 13:16:59 +03:00
hash_utils_64.c powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
highmem.c mm: fix race in kunmap_atomic() 2010-10-27 18:03:05 -07:00
hugetlbpage-hash64.c powerpc/mm: Add some debug output when hash insertion fails 2010-07-23 12:56:56 +10:00
hugetlbpage.c powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
init_32.c powerpc: Force page alignment for initrd reserved memory 2011-06-09 16:52:38 +10:00
init_64.c powerpc: Force page alignment for initrd reserved memory 2011-06-09 16:52:38 +10:00
Makefile powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips 2010-10-14 00:55:14 -05:00
mem.c powerpc: Force page alignment for initrd reserved memory 2011-06-09 16:52:38 +10:00
mmap_64.c powerpc: Use helpers for rlimits 2010-01-15 13:20:08 +11:00
mmu_context_hash32.c PPC: Split context init/destroy functions 2010-05-17 12:18:20 +03:00
mmu_context_hash64.c powerpc: Fix compile with icwsx support 2011-05-06 13:18:34 +10:00
mmu_context_nohash.c powerpc: Add TLB size detection for TYPE_3E MMUs 2011-04-27 13:02:10 +10:00
mmu_decl.h powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips 2010-10-14 00:55:14 -05:00
numa.c powerpc: Convert old cpumask API into new one 2011-05-04 15:22:59 +10:00
pgtable_32.c powerpc: Remove ioremap_flags 2011-05-19 14:30:43 +10:00
pgtable_64.c powerpc: Remove ioremap_flags 2011-05-19 14:30:43 +10:00
pgtable.c mm, powerpc: move the RCU page-table freeing into generic code 2011-05-25 08:39:16 -07:00
ppc_mmu_32.c memblock: Remove rmo_size, burry it in arch/powerpc where it belongs 2010-08-05 12:56:08 +10:00
slb_low.S powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
slb.c powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
slice.c powerpc: is_hugepage_only_range() must account for both 4kB and 64kB slices 2009-01-16 16:15:16 +11:00
stab.c powerpc: Free up some CPU feature bits by moving out MMU-related features 2011-04-27 14:18:52 +10:00
subpage-prot.c include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
tlb_hash32.c mm, powerpc: move the RCU page-table freeing into generic code 2011-05-25 08:39:16 -07:00
tlb_hash64.c mm, powerpc: move the RCU page-table freeing into generic code 2011-05-25 08:39:16 -07:00
tlb_low_64e.S Merge branch 'for-linus2' of git://git.profusion.mobi/users/lucas/linux-2.6 2011-04-07 11:14:49 -07:00
tlb_nohash_low.S powerpc/476: Workaround for PLB6 hang 2011-02-02 06:59:02 -05:00
tlb_nohash.c mm, powerpc: move the RCU page-table freeing into generic code 2011-05-25 08:39:16 -07:00