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When starting an SMP hardware thread, copy the cache partition configuration so that the threads share the same cache partitions. Also enable the GCOn bit if running in the local half of the virtual address space to enable coherency of shared local cache partitions. An atomic unlock system event is executed by the new cpu before any memory is read to ensure that any writes made by the boot cpu prior to full coherency taking effect are visible to the new cpu. This is to allow SMP to work even when the bootloader hasn't configured the caches for coherency. A log message is printed to describe the cache partition changes so that the user is aware of potential unintentional cache wastage if they've configured the cache partitions in the wrong way. Signed-off-by: James Hogan <james.hogan@imgtec.com> |
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.. | ||
perf | ||
.gitignore | ||
asm-offsets.c | ||
cachepart.c | ||
clock.c | ||
core_reg.c | ||
da.c | ||
devtree.c | ||
dma.c | ||
ftrace_stub.S | ||
ftrace.c | ||
head.S | ||
irq.c | ||
kick.c | ||
machines.c | ||
Makefile | ||
metag_ksyms.c | ||
module.c | ||
perf_callchain.c | ||
process.c | ||
ptrace.c | ||
setup.c | ||
signal.c | ||
smp.c | ||
stacktrace.c | ||
sys_metag.c | ||
tbiunexp.S | ||
tcm.c | ||
time.c | ||
topology.c | ||
traps.c | ||
user_gateway.S | ||
vmlinux.lds.S |