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fe0c52fc00
While debugging an unrelated issue with the GICv3 ITS driver, the following trace triggered: WARNING: CPU: 1 PID: 1 at kernel/irq/irqdomain.c:1121 irq_domain_free_irqs+0x160/0x17c() NULL pointer, cannot free irq Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W 3.19.0-rc6+ #3690 Hardware name: FVP Base (DT) Call trace: [<ffffffc000089398>] dump_backtrace+0x0/0x13c [<ffffffc0000894e4>] show_stack+0x10/0x1c [<ffffffc00066d134>] dump_stack+0x74/0x94 [<ffffffc0000a92f8>] warn_slowpath_common+0x9c/0xd4 [<ffffffc0000a938c>] warn_slowpath_fmt+0x5c/0x80 [<ffffffc0000ee04c>] irq_domain_free_irqs+0x15c/0x17c [<ffffffc0000ef918>] msi_domain_free_irqs+0x58/0x74 [<ffffffc000386f58>] free_msi_irqs+0xb4/0x1c0 // The msi_prepare callback fails here [<ffffffc0003872c0>] pci_enable_msix+0x25c/0x3d4 [<ffffffc00038746c>] pci_enable_msix_range+0x34/0x80 [<ffffffc0003924ac>] vp_try_to_find_vqs+0xec/0x528 [<ffffffc000392954>] vp_find_vqs+0x6c/0xa8 [<ffffffc0003ee2a8>] init_vq+0x120/0x248 [<ffffffc0003eefb0>] virtblk_probe+0xb0/0x6bc [<ffffffc00038fc34>] virtio_dev_probe+0x17c/0x214 [<ffffffc0003d4a04>] driver_probe_device+0x7c/0x23c [<ffffffc0003d4cb0>] __driver_attach+0x98/0xa0 [<ffffffc0003d2c60>] bus_for_each_dev+0x60/0xb4 [<ffffffc0003d455c>] driver_attach+0x1c/0x28 [<ffffffc0003d41b0>] bus_add_driver+0x150/0x208 [<ffffffc0003d54c0>] driver_register+0x64/0x130 [<ffffffc00038f9e8>] register_virtio_driver+0x24/0x68 [<ffffffc00091320c>] init+0x70/0xac [<ffffffc0000828f0>] do_one_initcall+0x94/0x1d0 [<ffffffc0008e9b00>] kernel_init_freeable+0x144/0x1e4 [<ffffffc00066a434>] kernel_init+0xc/0xd8 ---[ end trace f9ee562a77cc7bae ]--- The ITS msi_prepare callback having failed, we end-up trying to free MSIs that have never been allocated. Oddly enough, the kernel is pretty upset about it. It turns out that this behaviour was expected before the MSI domain was introduced (and dealt with in arch_teardown_msi_irqs). The obvious fix is to detect this early enough and bail out. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/1422299419-6051-1-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
338 lines
8.6 KiB
C
338 lines
8.6 KiB
C
/*
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* linux/kernel/irq/msi.c
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*
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* Copyright (C) 2014 Intel Corp.
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* Author: Jiang Liu <jiang.liu@linux.intel.com>
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*
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* This file is licensed under GPLv2.
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*
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* This file contains common code to support Message Signalled Interrupt for
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* PCI compatible and non PCI compatible devices.
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*/
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/msi.h>
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/* Temparory solution for building, will be removed later */
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#include <linux/pci.h>
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void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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{
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*msg = entry->msg;
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}
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
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{
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struct msi_desc *entry = irq_get_msi_desc(irq);
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__get_cached_msi_msg(entry, msg);
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}
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EXPORT_SYMBOL_GPL(get_cached_msi_msg);
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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static inline void irq_chip_write_msi_msg(struct irq_data *data,
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struct msi_msg *msg)
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{
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data->chip->irq_write_msi_msg(data, msg);
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}
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/**
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* msi_domain_set_affinity - Generic affinity setter function for MSI domains
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* @irq_data: The irq data associated to the interrupt
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* @mask: The affinity mask to set
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* @force: Flag to enforce setting (disable online checks)
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*
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* Intended to be used by MSI interrupt controllers which are
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* implemented with hierarchical domains.
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*/
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int msi_domain_set_affinity(struct irq_data *irq_data,
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const struct cpumask *mask, bool force)
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{
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struct irq_data *parent = irq_data->parent_data;
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struct msi_msg msg;
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int ret;
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ret = parent->chip->irq_set_affinity(parent, mask, force);
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if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
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BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
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irq_chip_write_msi_msg(irq_data, &msg);
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}
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return ret;
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}
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static void msi_domain_activate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
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irq_chip_write_msi_msg(irq_data, &msg);
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}
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static void msi_domain_deactivate(struct irq_domain *domain,
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struct irq_data *irq_data)
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{
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struct msi_msg msg;
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memset(&msg, 0, sizeof(msg));
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irq_chip_write_msi_msg(irq_data, &msg);
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}
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static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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{
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struct msi_domain_info *info = domain->host_data;
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struct msi_domain_ops *ops = info->ops;
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irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
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int i, ret;
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if (irq_find_mapping(domain, hwirq) > 0)
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return -EEXIST;
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ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
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if (ret < 0)
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return ret;
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for (i = 0; i < nr_irqs; i++) {
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ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
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if (ret < 0) {
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if (ops->msi_free) {
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for (i--; i > 0; i--)
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ops->msi_free(domain, info, virq + i);
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}
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irq_domain_free_irqs_top(domain, virq, nr_irqs);
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return ret;
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}
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}
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return 0;
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}
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static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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{
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struct msi_domain_info *info = domain->host_data;
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int i;
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if (info->ops->msi_free) {
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for (i = 0; i < nr_irqs; i++)
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info->ops->msi_free(domain, info, virq + i);
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}
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irq_domain_free_irqs_top(domain, virq, nr_irqs);
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}
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static struct irq_domain_ops msi_domain_ops = {
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.alloc = msi_domain_alloc,
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.free = msi_domain_free,
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.activate = msi_domain_activate,
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.deactivate = msi_domain_deactivate,
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};
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#ifdef GENERIC_MSI_DOMAIN_OPS
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static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
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msi_alloc_info_t *arg)
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{
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return arg->hwirq;
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}
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static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
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int nvec, msi_alloc_info_t *arg)
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{
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memset(arg, 0, sizeof(*arg));
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return 0;
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}
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static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
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struct msi_desc *desc)
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{
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arg->desc = desc;
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}
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#else
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#define msi_domain_ops_get_hwirq NULL
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#define msi_domain_ops_prepare NULL
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#define msi_domain_ops_set_desc NULL
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#endif /* !GENERIC_MSI_DOMAIN_OPS */
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static int msi_domain_ops_init(struct irq_domain *domain,
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struct msi_domain_info *info,
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unsigned int virq, irq_hw_number_t hwirq,
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msi_alloc_info_t *arg)
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{
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irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
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info->chip_data);
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if (info->handler && info->handler_name) {
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__irq_set_handler(virq, info->handler, 0, info->handler_name);
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if (info->handler_data)
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irq_set_handler_data(virq, info->handler_data);
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}
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return 0;
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}
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static int msi_domain_ops_check(struct irq_domain *domain,
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struct msi_domain_info *info,
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struct device *dev)
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{
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return 0;
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}
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static struct msi_domain_ops msi_domain_ops_default = {
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.get_hwirq = msi_domain_ops_get_hwirq,
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.msi_init = msi_domain_ops_init,
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.msi_check = msi_domain_ops_check,
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.msi_prepare = msi_domain_ops_prepare,
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.set_desc = msi_domain_ops_set_desc,
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};
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static void msi_domain_update_dom_ops(struct msi_domain_info *info)
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{
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struct msi_domain_ops *ops = info->ops;
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if (ops == NULL) {
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info->ops = &msi_domain_ops_default;
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return;
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}
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if (ops->get_hwirq == NULL)
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ops->get_hwirq = msi_domain_ops_default.get_hwirq;
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if (ops->msi_init == NULL)
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ops->msi_init = msi_domain_ops_default.msi_init;
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if (ops->msi_check == NULL)
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ops->msi_check = msi_domain_ops_default.msi_check;
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if (ops->msi_prepare == NULL)
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ops->msi_prepare = msi_domain_ops_default.msi_prepare;
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if (ops->set_desc == NULL)
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ops->set_desc = msi_domain_ops_default.set_desc;
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}
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static void msi_domain_update_chip_ops(struct msi_domain_info *info)
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{
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struct irq_chip *chip = info->chip;
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BUG_ON(!chip);
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if (!chip->irq_mask)
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chip->irq_mask = pci_msi_mask_irq;
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if (!chip->irq_unmask)
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chip->irq_unmask = pci_msi_unmask_irq;
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if (!chip->irq_set_affinity)
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chip->irq_set_affinity = msi_domain_set_affinity;
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}
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/**
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* msi_create_irq_domain - Create a MSI interrupt domain
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* @of_node: Optional device-tree node of the interrupt controller
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* @info: MSI domain info
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* @parent: Parent irq domain
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*/
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struct irq_domain *msi_create_irq_domain(struct device_node *node,
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struct msi_domain_info *info,
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struct irq_domain *parent)
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{
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if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
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msi_domain_update_dom_ops(info);
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if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
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msi_domain_update_chip_ops(info);
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return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
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info);
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}
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/**
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* msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
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* @domain: The domain to allocate from
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* @dev: Pointer to device struct of the device for which the interrupts
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* are allocated
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* @nvec: The number of interrupts to allocate
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*
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* Returns 0 on success or an error code.
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*/
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int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
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int nvec)
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{
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struct msi_domain_info *info = domain->host_data;
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struct msi_domain_ops *ops = info->ops;
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msi_alloc_info_t arg;
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struct msi_desc *desc;
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int i, ret, virq = -1;
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ret = ops->msi_check(domain, info, dev);
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if (ret == 0)
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ret = ops->msi_prepare(domain, dev, nvec, &arg);
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if (ret)
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return ret;
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for_each_msi_entry(desc, dev) {
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ops->set_desc(&arg, desc);
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if (info->flags & MSI_FLAG_IDENTITY_MAP)
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virq = (int)ops->get_hwirq(info, &arg);
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else
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virq = -1;
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virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
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dev_to_node(dev), &arg, false);
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if (virq < 0) {
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ret = -ENOSPC;
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if (ops->handle_error)
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ret = ops->handle_error(domain, desc, ret);
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if (ops->msi_finish)
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ops->msi_finish(&arg, ret);
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return ret;
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}
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for (i = 0; i < desc->nvec_used; i++)
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irq_set_msi_desc_off(virq, i, desc);
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}
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if (ops->msi_finish)
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ops->msi_finish(&arg, 0);
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for_each_msi_entry(desc, dev) {
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if (desc->nvec_used == 1)
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dev_dbg(dev, "irq %d for MSI\n", virq);
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else
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dev_dbg(dev, "irq [%d-%d] for MSI\n",
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virq, virq + desc->nvec_used - 1);
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}
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return 0;
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}
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/**
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* msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
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* @domain: The domain to managing the interrupts
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* @dev: Pointer to device struct of the device for which the interrupts
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* are free
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*/
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void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
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{
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struct msi_desc *desc;
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for_each_msi_entry(desc, dev) {
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/*
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* We might have failed to allocate an MSI early
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* enough that there is no IRQ associated to this
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* entry. If that's the case, don't do anything.
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*/
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if (desc->irq) {
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irq_domain_free_irqs(desc->irq, desc->nvec_used);
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desc->irq = 0;
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}
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}
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}
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/**
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* msi_get_domain_info - Get the MSI interrupt domain info for @domain
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* @domain: The interrupt domain to retrieve data from
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*
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* Returns the pointer to the msi_domain_info stored in
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* @domain->host_data.
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*/
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struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
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{
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return (struct msi_domain_info *)domain->host_data;
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}
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#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
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